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1ebea4c8bd
tighter, more strict FileCheck assertions. Some of these I really like as they show case exactly what instruction sequences come out of these microscopic functionality tests. llvm-svn: 218936
45 lines
1.9 KiB
LLVM
45 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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define <16 x i32> @test1(i32* %x) {
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; CHECK-LABEL: test1:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovd (%rdi), %xmm0
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; CHECK-NEXT: vmovdqa32 {{.*}}(%rip), %zmm1
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; CHECK-NEXT: vpxord %zmm2, %zmm2, %zmm2
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; CHECK-NEXT: vpermt2d %zmm0, %zmm1, %zmm2
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; CHECK-NEXT: vmovdqa32 {{.*}}(%rip), %zmm0
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; CHECK-NEXT: vpermd %zmm2, %zmm0, %zmm0
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; CHECK-NEXT: retq
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%y = load i32* %x, align 4
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%res = insertelement <16 x i32>zeroinitializer, i32 %y, i32 4
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ret <16 x i32>%res
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}
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define <16 x i32> @test2(<16 x i32> %x) {
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; CHECK-LABEL: test2:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpaddd {{.*}}(%rip){1to16}, %zmm0, %zmm0
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; CHECK-NEXT: retq
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%res = add <16 x i32><i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, %x
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ret <16 x i32>%res
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}
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define <16 x float> @test3(<4 x float> %a) {
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; CHECK-LABEL: test3:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovhlps %xmm0, %xmm0, %xmm1
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; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; CHECK-NEXT: vmovss %xmm0, %xmm2, %xmm0
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; CHECK-NEXT: vmovss %xmm1, %xmm2, %xmm1
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; CHECK-NEXT: vshufps {{.*#+}} xmm0 = xmm1[1,0],xmm0[0,1]
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; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
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; CHECK-NEXT: vxorps %ymm1, %ymm1, %ymm1
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; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
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; CHECK-NEXT: retq
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%b = extractelement <4 x float> %a, i32 2
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%c = insertelement <16 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float undef, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, float %b, i32 5
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%b1 = extractelement <4 x float> %a, i32 0
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%c1 = insertelement <16 x float> %c, float %b1, i32 6
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ret <16 x float>%c1
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}
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