Simon Pilgrim eb7d07a957 [X86][AVX2] Begun adding fast-isel tests to match clang/test/CodeGen/avx2-builtins.c ... llvm-svn: 270683		2016-05-25 10:15:06 +00:00
..
AArch64	[AArch64] Disable narrow load merge by default	2016-05-20 18:45:49 +00:00
AMDGPU	[AMDGPU][NFC] Rename ReserveTrapVGPRs -> ReserveRegs	2016-05-24 18:37:18 +00:00
ARM	[ARM, AArch64] Match additional patterns to ldN instructions	2016-05-19 21:39:00 +00:00
BPF	[BPF] Remove exit-on-error flag in test (PR27766)	2016-05-23 14:57:19 +00:00
Generic
Hexagon	When looking for a spill slot in reg scavenger, find one that matches RC	2016-05-18 18:16:00 +00:00
Inputs
Lanai	[lanai] Change reloc to use PIC_ by default and cleanup.	2016-05-20 21:41:53 +00:00
Mips	[mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.	2016-05-19 10:42:14 +00:00
MIR	[llc] New diagnostic handler	2016-05-16 14:28:02 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Add a testcase for TCO on string rvo function	2016-05-20 22:42:01 +00:00
SPARC	[SPARC] Fix 8 and 16-bit atomic load and store.	2016-05-23 20:33:00 +00:00
SystemZ	[SystemZ] Fix register ordering for BinaryRRF instructions	2016-05-18 13:24:57 +00:00
Thumb
Thumb2
WebAssembly	[WebAssembly] Put __stack_pointer in the offset field of loads and stores.	2016-05-24 23:47:41 +00:00
WinEH
X86	[X86][AVX2] Begun adding fast-isel tests to match clang/test/CodeGen/avx2-builtins.c	2016-05-25 10:15:06 +00:00
XCore