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d76041cf58
optimization level. This only really affects llc for now because both the llvm-gcc and clang front ends override the default register allocator. I intend to remove that code later. llvm-svn: 104904
20 lines
853 B
LLVM
20 lines
853 B
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -regalloc=linearscan | grep {movl %edx, 12(%esp)} | count 2
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; rdar://6992609
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target triple = "i386-apple-darwin9.0"
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@llvm.used = appending global [1 x i8*] [i8* bitcast (i64 (i64)* @_OSSwapInt64 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define i64 @_OSSwapInt64(i64 %_data) nounwind {
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entry:
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%retval = alloca i64 ; <i64*> [#uses=2]
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%_data.addr = alloca i64 ; <i64*> [#uses=4]
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store i64 %_data, i64* %_data.addr
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%tmp = load i64* %_data.addr ; <i64> [#uses=1]
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%0 = call i64 asm "bswap %eax\0A\09bswap %edx\0A\09xchgl %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i64 %tmp) nounwind ; <i64> [#uses=1]
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store i64 %0, i64* %_data.addr
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%tmp1 = load i64* %_data.addr ; <i64> [#uses=1]
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store i64 %tmp1, i64* %retval
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%1 = load i64* %retval ; <i64> [#uses=1]
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ret i64 %1
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}
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