Daniel Sanders eca59314c9 [mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only. ... Summary: Following on from r209907 which made personality encodings indirect, do the same for TType encodings. This fixes the case where a try/catch block needs to generate references to, for example, std::exception in the .gcc_except_table. Previous attempts at committing this broke the buildbots due to bugs in IAS. These bugs have now been fixed so trying again. Reviewers: petarj Reviewed By: petarj Subscribers: srhines, joerg, tberghammer, llvm-commits Differential Revision: http://reviews.llvm.org/D9669 llvm-svn: 238863		2015-06-02 20:32:50 +00:00
..
AArch64	AArch64: Use CMP;CCMP sequences for and/or/setcc trees.	2015-06-01 22:31:17 +00:00
ARM	Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs"	2015-06-02 11:47:30 +00:00
BPF	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
CPP	[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction	2015-04-16 23:24:18 +00:00
Generic	Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).	2015-05-27 18:02:19 +00:00
Hexagon	Revert "[Hexagon] Adding basic ELF relocation generation and testing advanced relaxation codepath."	2015-06-01 19:20:47 +00:00
Inputs	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00
Mips	[mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.	2015-06-02 20:32:50 +00:00
MIR	MIR Serialization: use correct line and column numbers for LLVM IR errors.	2015-05-29 17:05:41 +00:00
MSP430
NVPTX	[NVPTXFavorNonGenericAddrSpaces] recursively trace into GEP and BitCast	2015-05-29 17:00:27 +00:00
PowerPC	Add support for VSX FMA single-precision instructions to the PPC back end	2015-05-29 17:13:25 +00:00
R600	LiveRangeEdit: Fix liveranges not shrinking on subrange kill.	2015-06-01 21:26:26 +00:00
SPARC	Add support for the Sparc implementation-defined "ASR" registers.	2015-05-18 16:29:48 +00:00
SystemZ	[DAGCombiner] Account for getVectorIdxTy() when narrowing vector load	2015-05-05 19:34:10 +00:00
Thumb	Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM.	2015-05-28 20:02:45 +00:00
Thumb2	Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs"	2015-06-02 11:47:30 +00:00
WinEH	[WinEH] C++ EH state numbering fixes	2015-05-20 23:22:24 +00:00
X86	make reciprocal estimate code generation more flexible by adding command-line options (2nd try)	2015-06-02 15:28:15 +00:00
XCore	IR: Give 'DI' prefix to debug info metadata	2015-04-29 16:38:44 +00:00