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4e2def1840
TableGen had been nicely generating code to print a number of instructions using shorter aliases (and PowerPC has plenty of short mnemonics), but we were not calling it. For some of the aliases we support in the parser, TableGen can't infer the "inverse" alias relationship, so there is still more to do. Thus, after some hours of updating test cases... llvm-svn: 235616
21 lines
432 B
LLVM
21 lines
432 B
LLVM
target datalayout = "E-m:e-p:32:32-i64:64-n32"
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target triple = "powerpc"
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; RUN: llc -mcpu=ppc < %s | FileCheck %s
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; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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define i64 @test1() nounwind {
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entry:
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%r = call i64 @llvm.readcyclecounter()
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ret i64 %r
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}
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; CHECK: @test1
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; CHECK: mfspr 3, 269
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; CHECK: mfspr 4, 268
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; CHECK: mfspr [[REG:[0-9]+]], 269
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; CHECK: cmpw 3, [[REG]]
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; CHECK: bne 0, .LBB
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declare i64 @llvm.readcyclecounter()
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