Simon Pilgrim ecd973d988 [SelectionDAG] BITREVERSE vector legalization of bit operations ... Vector bit operations are typically promoted instead of having custom lowering. This patch changes the isOperationLegalOrCustom tests for vector AND/OR operations to use isOperationLegalOrPromote instead, allowing the SSE implementations to stay on the simd unit. Differential Revision: http://reviews.llvm.org/D19805 llvm-svn: 268504		2016-05-04 15:01:13 +00:00
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Analysis	[SCEV] Tweak the output format and content of -analyze	2016-05-03 17:49:57 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[SelectionDAG] BITREVERSE vector legalization of bit operations	2016-05-04 15:01:13 +00:00
DebugInfo	[mips][ias] Only round section sizes when explicitly requested.	2016-05-04 13:21:06 +00:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
LibDriver
Linker
LTO
MC	[mips][ias] Only round section sizes when explicitly requested.	2016-05-04 13:21:06 +00:00
Object	Produce another specific error message for a malformed Mach-O file when a load	2016-05-03 23:13:50 +00:00
Other	Add opt-bisect support to additional passes that can be skipped	2016-05-03 22:32:30 +00:00
SymbolRewriter
TableGen
ThinLTO/X86	ThinLTO: do not import function whose linkage prevents inlining.	2016-05-03 00:27:28 +00:00
tools	[llvm-readobj] Print MIPS .MIPS.options section content	2016-05-04 05:58:57 +00:00
Transforms	[RS4GC] Use SetVector/MapVector instead of DenseSet/DenseMap to guarantee stable ordering	2016-05-04 14:55:36 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg	Add llvm-pdbdump to the tool substitutions list in lit. NFC.	2016-05-02 16:51:26 +00:00
lit.site.cfg.in
TestRunner.sh