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Summary: This allows specifying instructions that are available only in specific assembler variant. If AsmVariantName is specified then instruction will be presented only in MatchTable for this variant. If not specified then assembler variants will be determined based on AsmString. Also this allows splitting assembler match tables in same way as it is done in dissasembler. Reviewers: ab, tstellarAMD, craig.topper, vpykhtin Subscribers: wdng Differential Revision: https://reviews.llvm.org/D24249 llvm-svn: 280952
47 lines
1.0 KiB
TableGen
47 lines
1.0 KiB
TableGen
// RUN: llvm-tblgen -gen-asm-matcher -I %p/../../include %s | FileCheck %s
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// Check that cpecifying AsmVariant works correctly
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include "llvm/Target/Target.td"
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def ArchInstrInfo : InstrInfo { }
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def FooAsmParserVariant : AsmParserVariant {
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let Variant = 0;
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let Name = "Foo";
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}
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def BarAsmParserVariant : AsmParserVariant {
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let Variant = 1;
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let Name = "Bar";
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}
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def Arch : Target {
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let InstructionSet = ArchInstrInfo;
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let AssemblyParserVariants = [FooAsmParserVariant, BarAsmParserVariant];
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}
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def Reg : Register<"reg">;
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def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
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def foo : Instruction {
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let Size = 2;
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let OutOperandList = (outs);
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let InOperandList = (ins);
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let AsmString = "foo";
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let AsmVariantName = "Foo";
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}
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def BarAlias : InstAlias<"bar", (foo)> {
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string AsmVariantName = "Bar";
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}
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// CHECK: static const MatchEntry MatchTable0[] = {
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// CHECK-NEXT: /* foo */, Arch::foo
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// CHECK-NEXT: };
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// CHECK: static const MatchEntry MatchTable1[] = {
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// CHECK-NEXT: /* bar */, Arch::foo
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// CHECK-NEXT: };
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