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AsmParser
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Revert r281336 (and r281337), it caused PR30372.
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2016-09-13 18:17:00 +00:00 |
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Disassembler
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Replace "fallthrough" comments with LLVM_FALLTHROUGH
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2016-08-17 05:10:15 +00:00 |
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InstPrinter
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MCTargetDesc
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[MC] Move .cv_loc management logic out of MCContext
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2016-08-26 17:58:37 +00:00 |
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TargetInfo
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Utils
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AArch64.h
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64.td
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[AArch64] Adjust the feature set for Exynos M1.
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2016-08-24 18:17:30 +00:00 |
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AArch64A53Fix835769.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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AArch64A57FPLoadBalancing.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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AArch64AddressTypePromotion.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64AdvSIMDScalarPass.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64AsmPrinter.cpp
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Use abstraction in AArch64AsmPrinter::lowerSTACKMAP. NFCI
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2016-08-31 12:43:49 +00:00 |
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AArch64BranchRelaxation.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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AArch64CallingConvention.h
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AArch64CallingConvention.td
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AArch64CallLowering.cpp
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GlobalISel: move type information to MachineRegisterInfo.
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2016-09-09 11:46:34 +00:00 |
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AArch64CallLowering.h
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GlobalISel: use G_TYPE to annotate physregs with a type.
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2016-08-31 21:24:02 +00:00 |
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AArch64CleanupLocalDynamicTLSPass.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64CollectLOH.cpp
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Replace incorrect "#ifdef DEBUG" with "#ifndef NDEBUG".
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2016-08-30 03:16:16 +00:00 |
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AArch64ConditionalCompares.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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AArch64ConditionOptimizer.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64DeadRegisterDefinitionsPass.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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AArch64ExpandPseudoInsts.cpp
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AArch64FastISel.cpp
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Swift Calling Convetion: add support for AArch64.
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2016-08-26 19:28:17 +00:00 |
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AArch64FrameLowering.cpp
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Move helpers into anonymous namespaces. NFC.
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2016-08-06 11:13:10 +00:00 |
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AArch64FrameLowering.h
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AArch64InstrAtomics.td
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AArch64: properly calculate cmpxchg status in FastISel.
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2016-08-02 20:22:36 +00:00 |
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AArch64InstrFormats.td
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[SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
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2016-08-18 20:08:15 +00:00 |
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AArch64InstrInfo.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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AArch64InstrInfo.h
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
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AArch64InstrInfo.td
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[AArch64] Avoid materializing constant 1 by using csinc, rather than csel.
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2016-08-26 14:01:55 +00:00 |
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AArch64InstructionSelector.cpp
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GlobalISel: remove "unsized" LLT
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2016-09-15 10:09:59 +00:00 |
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AArch64InstructionSelector.h
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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AArch64ISelDAGToDAG.cpp
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getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCI
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2016-09-14 16:05:51 +00:00 |
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AArch64ISelLowering.cpp
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getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI
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2016-09-14 16:37:15 +00:00 |
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AArch64ISelLowering.h
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AArch64: Cleanup tailcall CC check, enable swiftcc.
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2016-09-13 19:27:38 +00:00 |
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AArch64LoadStoreOptimizer.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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AArch64MachineFunctionInfo.h
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AArch64MachineLegalizer.cpp
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GlobalISel: legalize GEP instructions with small offsets.
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2016-09-15 11:02:19 +00:00 |
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AArch64MachineLegalizer.h
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AArch64MCInstLower.cpp
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AArch64MCInstLower.h
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AArch64PBQPRegAlloc.cpp
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AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PromoteConstant.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64RedundantCopyElimination.cpp
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MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
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2016-08-25 01:27:13 +00:00 |
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AArch64RegisterBankInfo.cpp
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GlobalISel: remove "unsized" LLT
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2016-09-15 10:09:59 +00:00 |
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AArch64RegisterBankInfo.h
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AArch64RegisterInfo.cpp
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MachineFunction: Return reference for getFrameInfo(); NFC
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2016-07-28 18:40:00 +00:00 |
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AArch64RegisterInfo.h
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AArch64RegisterInfo.td
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AArch64SchedA53.td
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AArch64SchedA57.td
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AArch64SchedA57WriteRes.td
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AArch64SchedCyclone.td
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AArch64SchedKryo.td
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AArch64SchedKryoDetails.td
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AArch64SchedM1.td
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[AArch64] Adjust the scheduling model for Exynos M1.
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2016-09-06 19:22:29 +00:00 |
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AArch64Schedule.td
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AArch64SchedVulcan.td
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AArch64SelectionDAGInfo.cpp
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AArch64SelectionDAGInfo.h
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AArch64StorePairSuppress.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64Subtarget.cpp
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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AArch64Subtarget.h
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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AArch64SystemOperands.td
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AArch64TargetMachine.cpp
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[AArch64] Register passes so they can be run by llc
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2016-08-01 05:56:57 +00:00 |
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AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
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AArch64TargetTransformInfo.h
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CMakeLists.txt
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[GlobalISel] Introduce an instruction selector.
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2016-07-27 14:31:55 +00:00 |
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LLVMBuild.txt
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