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This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"
For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"
Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.
Differential Revision: https://reviews.llvm.org/D38851
llvm-svn: 316101
28 lines
1.0 KiB
LLVM
28 lines
1.0 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; This testcase would fail on a bitcast from v64i16 to v32i32. Check that
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; is compiles without errors.
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; CHECK: valign
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; CHECK: vshuff
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target triple = "hexagon"
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declare <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32>) #0
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declare <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32>, <32 x i32>, i32) #0
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declare <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32>, <32 x i32>, i32) #0
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define void @fred() #1 {
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entry:
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%t0 = bitcast <64 x i16> zeroinitializer to <32 x i32>
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%t1 = tail call <32 x i32> @llvm.hexagon.V6.valignbi.128B(<32 x i32> %t0, <32 x i32> undef, i32 2)
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%t2 = tail call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> undef, <32 x i32> %t1, i32 -2)
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%t3 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %t2)
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store <64 x i16> zeroinitializer, <64 x i16>* undef, align 128
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store <32 x i32> %t3, <32 x i32>* undef, align 128
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unreachable
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }
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