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0f20d48a09
This reapplies 36c64af9d7f97414d48681b74352c9684077259b in updated form. Emit the xdata for each function at .seh_endproc. This keeps the exact same output header order for most code generated by the LLVM CodeGen layer. (Sections still change order for code built from assembly where functions lack an explicit .seh_handlerdata directive, and functions with chained unwind info.) The practical effect should be that assembly output lacks superfluous ".seh_handlerdata; .text" pairs at the end of functions that don't handle exceptions, which allows such functions to use the AArch64 packed unwind format again. Differential Revision: https://reviews.llvm.org/D87448
157 lines
6.5 KiB
YAML
157 lines
6.5 KiB
YAML
# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog -filetype=obj \
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# RUN: | llvm-readobj --unwind - | FileCheck %s
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# RUN: llc -o - %s -mtriple=aarch64-windows -run-pass=aarch64-ldst-opt \
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# RUN: | FileCheck %s --check-prefix=CHECK-LDSTOPT
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# This test case checks the basic validity of the .xdata section. It's
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# documented at:
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# https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling
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# Also test the generated assembler SEH directives.
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# RUN: llc -o - %s -mtriple=aarch64-windows -start-after=prologepilog -filetype=asm \
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# RUN: | FileCheck %s --check-prefix=ASM
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# We expect to see the following in the .xdata section:
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# CHECK: ExceptionData {
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# CHECK-NEXT: FunctionLength: 96
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# CHECK-NEXT: Version: 0
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# CHECK-NEXT: ExceptionData: No
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# CHECK-NEXT: EpiloguePacked: No
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# CHECK-NEXT: EpilogueScopes: 1
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# CHECK-NEXT: ByteCodeLength: 28
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# CHECK-NEXT: Prologue [
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# CHECK-NEXT: 0xc808 ; stp x19, x20, [sp, #64]
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# CHECK-NEXT: 0xd0c7 ; str x22, [sp, #56]
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# CHECK-NEXT: 0xd086 ; str x21, [sp, #48]
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# CHECK-NEXT: 0xc904 ; stp x23, x24, [sp, #32]
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# CHECK-NEXT: 0xc982 ; stp x25, x26, [sp, #16]
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# CHECK-NEXT: 0xce09 ; stp x27, x28, [sp, #-80]!
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# CHECK-NEXT: 0xe4 ; end
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# CHECK-NEXT: ]
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# CHECK-NEXT: EpilogueScopes [
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# CHECK-NEXT: EpilogueScope {
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# CHECK-NEXT: StartOffset: 16
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# CHECK-NEXT: EpilogueStartIndex: 13
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# CHECK-NEXT: Opcodes [
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# CHECK-NEXT: 0xc808 ; ldp x19, x20, [sp, #64]
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# CHECK-NEXT: 0xd086 ; ldr x21, [sp, #48]
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# CHECK-NEXT: 0xe3 ; nop
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# CHECK-NEXT: 0xd0c7 ; ldr x22, [sp, #56]
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# CHECK-NEXT: 0xc904 ; ldp x23, x24, [sp, #32]
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# CHECK-NEXT: 0xc982 ; ldp x25, x26, [sp, #16]
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# CHECK-NEXT: 0xce09 ; ldp x27, x28, [sp], #80
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# CHECK-NEXT: 0xe4 ; end
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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# CHECK-NEXT: ]
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# CHECK-NEXT: }
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# Check that the load-store optimizer does not merge the two
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# callee-saved stores in the prologue.
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# CHECK-LDSTOPT: name: test
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# CHECK-LDSTOPT: frame-setup STRXui killed $x21, $sp, 6
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# CHECK-LDSTOPT: frame-setup STRXui killed $x22, $sp, 7
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# ASM-LABEL: test:
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# ASM: .seh_proc test
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# ASM: .seh_save_regp_x x27, 80
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# ASM: .seh_save_regp x25, 16
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# ASM: .seh_save_regp x23, 32
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# ASM: .seh_save_reg x21, 48
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# ASM: .seh_save_reg x22, 56
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# ASM: .seh_save_regp x19, 64
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# ASM: .seh_endprologue
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# ASM: .seh_startepilogue
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# ASM: .seh_save_regp x19, 64
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# ASM: .seh_save_reg x21, 48
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# ASM: .seh_nop
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# ASM: .seh_save_reg x22, 56
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# ASM: .seh_save_regp x23, 32
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# ASM: .seh_save_regp x25, 16
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# ASM: .seh_save_regp_x x27, 80
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# ASM: .seh_endepilogue
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# ASM: .seh_endfunclet
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# ASM: .seh_endproc
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...
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---
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name: test
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alignment: 4
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tracksRegLiveness: true
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hasWinCFI: true
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liveins:
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- { reg: '$w0' }
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frameInfo:
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stackSize: 80
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maxAlignment: 8
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: true
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stack:
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- { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x19' }
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- { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x20' }
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- { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x21' }
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- { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x22' }
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- { id: 4, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x23' }
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- { id: 5, type: spill-slot, offset: -48, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x24' }
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- { id: 6, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x25' }
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- { id: 7, type: spill-slot, offset: -64, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x26' }
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- { id: 8, type: spill-slot, offset: -72, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x27' }
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- { id: 9, type: spill-slot, offset: -80, size: 8, alignment: 8, stack-id: default,
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callee-saved-register: '$x28' }
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x27, $x28, $x25, $x26, $x23, $x24, $x21, $x22, $x19, $x20
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early-clobber $sp = frame-setup STPXpre killed $x27, killed $x28, $sp, -10 :: (store 8 into %stack.8), (store 8 into %stack.9)
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frame-setup SEH_SaveRegP_X 27, 28, -80
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frame-setup STPXi killed $x25, killed $x26, $sp, 2 :: (store 8 into %stack.6), (store 8 into %stack.7)
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frame-setup SEH_SaveRegP 25, 26, 16
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frame-setup STPXi killed $x23, killed $x24, $sp, 4 :: (store 8 into %stack.4), (store 8 into %stack.5)
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frame-setup SEH_SaveRegP 23, 24, 32
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frame-setup STRXui killed $x21, $sp, 6 :: (store 8 into %stack.2)
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frame-setup SEH_SaveReg 21, 48
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frame-setup STRXui killed $x22, $sp, 7 :: (store 8 into %stack.3)
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frame-setup SEH_SaveReg 22, 56
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frame-setup STPXi killed $x19, killed $x20, $sp, 8 :: (store 8 into %stack.0), (store 8 into %stack.1)
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frame-setup SEH_SaveRegP 19, 20, 64
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frame-setup SEH_PrologEnd
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$x19 = ADDXrr $x0, killed $x1
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$x20 = ADDXrr $x19, killed $x0
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$x21 = ADDXrr $x20, killed $x19
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$x22 = ADDXrr $x21, killed $x20
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$x23 = ADDXrr $x22, killed $x21
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$x24 = ADDXrr $x23, killed $x22
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$x25 = ADDXrr $x24, killed $x23
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$x26 = ADDXrr $x25, killed $x24
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$x27 = ADDXrr $x26, killed $x25
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$x28 = ADDXrr $x27, killed $x26
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frame-destroy SEH_EpilogStart
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$x19, $x20 = frame-destroy LDPXi $sp, 8 :: (load 8 from %stack.0), (load 8 from %stack.1)
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frame-destroy SEH_SaveRegP 19, 20, 64
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$x21 = frame-destroy LDRXui $sp, 6 :: (load 8 from %stack.2)
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frame-destroy SEH_SaveReg 21, 48
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$x0 = COPY $x28
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frame-destroy SEH_Nop
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$x21 = frame-destroy LDRXui $sp, 6 :: (load 8 from %stack.2)
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frame-destroy SEH_SaveReg 22, 56
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$x23, $x24 = frame-destroy LDPXi $sp, 4 :: (load 8 from %stack.4), (load 8 from %stack.5)
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frame-destroy SEH_SaveRegP 23, 24, 32
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$x25, $x26 = frame-destroy LDPXi $sp, 2 :: (load 8 from %stack.6), (load 8 from %stack.7)
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frame-destroy SEH_SaveRegP 25, 26, 16
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early-clobber $sp, $x27, $x28 = frame-destroy LDPXpost $sp, 10 :: (load 8 from %stack.8), (load 8 from %stack.9)
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frame-destroy SEH_SaveRegP_X 27, 28, -80
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frame-destroy SEH_EpilogEnd
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RET_ReallyLR implicit $x0
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...
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