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5ee2be1ef2
Add the same level of support as for ARM mode (i.e. still no TLS support). In most cases, it is sufficient to replace the opcodes with the t2-equivalent, but there are some idiosyncrasies that I decided to preserve because I don't understand the full implications: * For ARM we use LDRi12 to load from constant pools, but for Thumb we use t2LDRpci (I'm not sure if the ideal would be to use t2LDRi12 for Thumb as well, or to use LDRcp for ARM). * For Thumb we don't have an equivalent for MOV|LDRLIT_ga_pcrel_ldr, so we have to generate MOV|LDRLIT_ga_pcrel plus a load from GOT. The tests are in separate files because they're hard enough to read even without doubling the number of checks. llvm-svn: 355077
30 lines
807 B
YAML
30 lines
807 B
YAML
# RUN: llc -mtriple arm-- -run-pass=legalizer %s -o - | FileCheck %s
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# RUN: llc -mtriple thumb-- -mattr=+v6t2 -run-pass=legalizer %s -o - | FileCheck %s
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--- |
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@a_global = global i32 42
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define void @test_global_variable() { ret void }
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...
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---
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name: test_global_variable
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# CHECK-LABEL: name: test_global_variable
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(s32) = COPY $r0
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%1(p0) = G_GLOBAL_VALUE @a_global
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; G_GLOBAL_VALUE is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(p0) = G_GLOBAL_VALUE @a_global
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$r0 = COPY %1(p0)
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BX_RET 14, $noreg, implicit $r0
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...
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