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llvm-mirror/test/CodeGen/ARM/Windows/chkstk-movw-movt-isel.ll
Fangrui Song 1c1cc1c5ed [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html

Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option
A subsequent change will reject -long-option.
2020-03-15 17:46:23 -07:00

28 lines
893 B
LLVM

; RUN: llc -mtriple thumbv7--windows-itanium -code-model large -verify-machineinstrs -filetype obj -o - %s \
; RUN: | llvm-objdump --no-show-raw-insn -d - | FileCheck %s
; ModuleID = 'reduced.c'
target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv7--windows-itanium"
define arm_aapcs_vfpcc i8 @isel(i32 %i) {
entry:
%i.addr = alloca i32, align 4
%buffer = alloca [4096 x i8], align 1
store i32 %i, i32* %i.addr, align 4
%0 = load i32, i32* %i.addr, align 4
%rem = urem i32 %0, 4096
%arrayidx = getelementptr inbounds [4096 x i8], [4096 x i8]* %buffer, i32 0, i32 %rem
%1 = load volatile i8, i8* %arrayidx, align 1
ret i8 %1
}
; CHECK-LABEL: isel
; CHECK: push {r4, r5, r6, lr}
; CHECK-DAG: movw r12, #0
; CHECK-DAG: movt r12, #0
; CHECK-DAG: movw r4, #{{\d*}}
; CHECK: blx r12
; CHECK: sub.w sp, sp, r4