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029d974b53
Summary:
Two utils methods have essentially the same functionality. This is an attempt to merge them into one.
1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred
2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor
Prior to the patch:
1. MergeBasicBlockIntoOnlyPred
Updates either DomTree or DeferredDominance
Moves all instructions from Pred to BB, deletes Pred
Asserts BB has single predecessor
If address was taken, replace the block address with constant 1 (?)
2. MergeBlockIntoPredecessor
Updates DomTree, LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
After the patch:
Method 2. MergeBlockIntoPredecessor is attempting to become the new default:
Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults
Moves all instruction from BB to Pred, deletes BB
Returns if doesn't have a single predecessor
Returns if BB's address was taken
Uses of MergeBasicBlockIntoOnlyPred that need to be replaced:
1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp
Updated in this patch. No challenges.
2. lib/CodeGen/CodeGenPrepare.cpp
Updated in this patch.
i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation.
ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks
Some interesting aspects:
- Since Pred is not deleted (BB is), the entry block does not need updating.
- The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred.
- isMergingEmptyBlockProfitable assumes BB is the one to be deleted.
- eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead.
- adding some test owner as subscribers for the interesting tests modified:
test/CodeGen/X86/avx-cmp.ll
test/CodeGen/AMDGPU/nested-loop-conditions.ll
test/CodeGen/AMDGPU/si-annotate-cf.ll
test/CodeGen/X86/hoist-spill.ll
test/CodeGen/X86/2006-11-17-IllegalMove.ll
3. lib/Transforms/Scalar/JumpThreading.cpp
Not covered in this patch. It is the only use case using the DeferredDominance.
I would defer to Brian Rzycki to make this replacement.
Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar
Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits
Differential Revision: https://reviews.llvm.org/D48202
llvm-svn: 335183
34 lines
1.1 KiB
LLVM
34 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
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define fastcc i32 @t() nounwind {
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; CHECK-LABEL: t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movzwl 0, %eax
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; CHECK-NEXT: orl $2, %eax
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; CHECK-NEXT: movw %ax, 0
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; CHECK-NEXT: shrl $3, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retl
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entry:
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br i1 false, label %UnifiedReturnBlock, label %bb4
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bb4: ; preds = %entry
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br i1 false, label %bb17, label %bb22
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bb17: ; preds = %bb4
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ret i32 1
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bb22: ; preds = %bb4
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br i1 true, label %walkExprTree.exit, label %bb4.i
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bb4.i: ; preds = %bb22
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ret i32 0
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walkExprTree.exit: ; preds = %bb22
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%tmp83 = load i16, i16* null, align 4 ; <i16> [#uses=1]
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%tmp84 = or i16 %tmp83, 2 ; <i16> [#uses=2]
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store i16 %tmp84, i16* null, align 4
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%tmp98993 = zext i16 %tmp84 to i32 ; <i32> [#uses=1]
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%tmp1004 = lshr i32 %tmp98993, 3 ; <i32> [#uses=1]
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%tmp100.lobit5 = and i32 %tmp1004, 1 ; <i32> [#uses=1]
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ret i32 %tmp100.lobit5
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UnifiedReturnBlock: ; preds = %entry
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ret i32 0
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}
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