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llvm-mirror/test/CodeGen/X86/vshift_split2.ll
Simon Pilgrim 29e9d9a1e2 [X86] Regenerate vector shift tests. NFCI.
Merge prefixes where possible, use 'X86' instead of 'X32' (which we try to only use for gnux32 triple tests).
2020-10-27 13:14:54 +00:00

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LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
; Legalization example that requires splitting a large vector into smaller pieces.
define void @update(<8 x i32> %val, <8 x i32>* %dst) nounwind {
; CHECK-LABEL: update:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: psrad $2, %xmm0
; CHECK-NEXT: psrad $4, %xmm1
; CHECK-NEXT: movdqa %xmm1, 16(%eax)
; CHECK-NEXT: movdqa %xmm0, (%eax)
; CHECK-NEXT: retl
entry:
%shl = shl <8 x i32> %val, < i32 2, i32 2, i32 2, i32 2, i32 4, i32 4, i32 4, i32 4 >
%shr = ashr <8 x i32> %val, < i32 2, i32 2, i32 2, i32 2, i32 4, i32 4, i32 4, i32 4 >
store <8 x i32> %shr, <8 x i32>* %dst
ret void
}