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4c16866a59
Currently the backend special cases x86_intrcc and treats the first parameter as byval. Make the IR require byval for this parameter to remove this special case, and avoid the dependence on the pointee element type. Fixes bug 46672. I'm not sure the IR is enforcing all the calling convention constraints. clang seems to ignore the attribute for empty parameter lists, but the IR tolerates it.
162 lines
5.4 KiB
LLVM
162 lines
5.4 KiB
LLVM
; RUN: llc -mtriple=i686-unknown-unknown < %s | FileCheck %s
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; RUN: llc -mtriple=i686-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
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%struct.interrupt_frame = type { i32, i32, i32, i32, i32 }
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@sink_address = global i32* null
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@sink_i32 = global i32 0
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; Spills eax, putting original esp at +4.
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; No stack adjustment if declared with no error code
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define x86_intrcc void @test_isr_no_ecode(%struct.interrupt_frame* byval(%struct.interrupt_frame) %frame) {
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; CHECK-LABEL: test_isr_no_ecode:
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; CHECK: pushl %eax
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; CHECK: movl 12(%esp), %eax
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; CHECK: popl %eax
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; CHECK: iretl
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; CHECK0-LABEL: test_isr_no_ecode:
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; CHECK0: pushl %eax
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; CHECK0: leal 4(%esp), %eax
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; CHECK0: movl 8(%eax), %eax
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; CHECK0: popl %eax
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; CHECK0: iretl
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%pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
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%flags = load i32, i32* %pflags, align 4
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call void asm sideeffect "", "r"(i32 %flags)
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ret void
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}
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; Spills eax and ecx, putting original esp at +8. Stack is adjusted up another 4 bytes
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; before return, popping the error code.
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define x86_intrcc void @test_isr_ecode(%struct.interrupt_frame* byval(%struct.interrupt_frame) %frame, i32 %ecode) {
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; CHECK-LABEL: test_isr_ecode
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; CHECK: pushl %ecx
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; CHECK: pushl %eax
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; CHECK: movl 8(%esp), %eax
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; CHECK: movl 20(%esp), %ecx
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; CHECK: popl %eax
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; CHECK: popl %ecx
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; CHECK: addl $4, %esp
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; CHECK: iretl
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; CHECK0-LABEL: test_isr_ecode
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; CHECK0: pushl %ecx
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; CHECK0: pushl %eax
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; CHECK0: movl 8(%esp), %ecx
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; CHECK0: leal 12(%esp), %eax
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; CHECK0: movl 8(%eax), %eax
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; CHECK0: popl %eax
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; CHECK0: popl %ecx
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; CHECK0: addl $4, %esp
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; CHECK0: iretl
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%pflags = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %frame, i32 0, i32 2
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%flags = load i32, i32* %pflags, align 4
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call x86_fastcallcc void asm sideeffect "", "r,r"(i32 %flags, i32 %ecode)
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ret void
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}
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; All clobbered registers must be saved
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define x86_intrcc void @test_isr_clobbers(%struct.interrupt_frame* byval(%struct.interrupt_frame) %frame, i32 %ecode) {
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call void asm sideeffect "", "~{eax},~{ebx},~{ebp}"()
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; CHECK-LABEL: test_isr_clobbers
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; CHECK: pushl %ebp
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; CHECK: pushl %ebx
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; CHECK: pushl %eax
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; CHECK: popl %eax
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; CHECK: popl %ebx
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; CHECK: popl %ebp
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; CHECK: addl $4, %esp
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; CHECK: iretl
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; CHECK0-LABEL: test_isr_clobbers
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; CHECK0: pushl %ebp
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; CHECK0: pushl %ebx
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; CHECK0: pushl %eax
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; CHECK0: popl %eax
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; CHECK0: popl %ebx
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; CHECK0: popl %ebp
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; CHECK0: addl $4, %esp
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; CHECK0: iretl
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ret void
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}
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@f80 = common global x86_fp80 0xK00000000000000000000, align 4
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; Test that the presence of x87 does not crash the FP stackifier
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define x86_intrcc void @test_isr_x87(%struct.interrupt_frame* byval(%struct.interrupt_frame) %frame) {
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; CHECK-LABEL: test_isr_x87
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; CHECK-DAG: fldt f80
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; CHECK-DAG: fld1
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; CHECK: faddp
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; CHECK-NEXT: fstpt f80
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; CHECK-NEXT: iretl
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entry:
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%ld = load x86_fp80, x86_fp80* @f80, align 4
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%add = fadd x86_fp80 %ld, 0xK3FFF8000000000000000
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store x86_fp80 %add, x86_fp80* @f80, align 4
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ret void
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}
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; Use a frame pointer to check the offsets. No return address, arguments start
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; at EBP+4.
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define dso_local x86_intrcc void @test_fp_1(%struct.interrupt_frame* byval(%struct.interrupt_frame) %p) #0 {
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; CHECK-LABEL: test_fp_1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK: cld
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; CHECK-DAG: leal 4(%ebp), %[[R1:[^ ]*]]
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; CHECK-DAG: leal 20(%ebp), %[[R2:[^ ]*]]
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; CHECK: movl %[[R1]], sink_address
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; CHECK: movl %[[R2]], sink_address
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; CHECK: popl %ebp
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; CHECK: iretl
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entry:
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%arrayidx = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %p, i32 0, i32 0
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%arrayidx2 = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %p, i32 0, i32 4
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store volatile i32* %arrayidx, i32** @sink_address
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store volatile i32* %arrayidx2, i32** @sink_address
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ret void
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}
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; The error code is between EBP and the interrupt_frame.
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define dso_local x86_intrcc void @test_fp_2(%struct.interrupt_frame* byval(%struct.interrupt_frame) %p, i32 %err) #0 {
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; CHECK-LABEL: test_fp_2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK: cld
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; CHECK-DAG: movl 4(%ebp), %[[R3:[^ ]*]]
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; CHECK-DAG: leal 8(%ebp), %[[R1:[^ ]*]]
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; CHECK-DAG: leal 24(%ebp), %[[R2:[^ ]*]]
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; CHECK: movl %[[R1]], sink_address
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; CHECK: movl %[[R2]], sink_address
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; CHECK: movl %[[R3]], sink_i32
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; CHECK: popl %ebp
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; CHECK: iretl
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entry:
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%arrayidx = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %p, i32 0, i32 0
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%arrayidx2 = getelementptr inbounds %struct.interrupt_frame, %struct.interrupt_frame* %p, i32 0, i32 4
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store volatile i32* %arrayidx, i32** @sink_address
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store volatile i32* %arrayidx2, i32** @sink_address
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store volatile i32 %err, i32* @sink_i32
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ret void
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}
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; Test argument copy elision when copied to a local alloca.
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define x86_intrcc void @test_copy_elide(%struct.interrupt_frame* byval(%struct.interrupt_frame) %frame, i32 %err) #0 {
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; CHECK-LABEL: test_copy_elide:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK: cld
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; CHECK: leal 4(%ebp), %[[R1:[^ ]*]]
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; CHECK: movl %[[R1]], sink_address
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entry:
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%err.addr = alloca i32, align 4
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store i32 %err, i32* %err.addr, align 4
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store volatile i32* %err.addr, i32** @sink_address
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ret void
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}
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attributes #0 = { nounwind "frame-pointer"="all" }
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