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f220e7cb76
We want to run the Machine Scheduler instead of the List Scheduler after RA. Checked with a performance run on a Power 9 machine with SPEC 2006 and while some benchmarks improved and others degraded the geomean was slightly improved with the Machine Scheduler. Differential Revision: https://reviews.llvm.org/D45265 llvm-svn: 336295
106 lines
3.4 KiB
LLVM
106 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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declare i32 @llvm.bitreverse.i32(i32)
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define i32 @testBitReverseIntrinsicI32(i32 %arg) {
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; CHECK-LABEL: testBitReverseIntrinsicI32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lis 4, -21846
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; CHECK-NEXT: lis 5, 21845
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; CHECK-NEXT: slwi 6, 3, 1
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; CHECK-NEXT: srwi 3, 3, 1
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; CHECK-NEXT: ori 4, 4, 43690
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; CHECK-NEXT: ori 5, 5, 21845
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; CHECK-NEXT: and 4, 6, 4
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; CHECK-NEXT: and 3, 3, 5
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; CHECK-NEXT: lis 5, 13107
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: lis 4, -13108
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; CHECK-NEXT: ori 5, 5, 13107
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; CHECK-NEXT: slwi 6, 3, 2
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; CHECK-NEXT: ori 4, 4, 52428
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; CHECK-NEXT: srwi 3, 3, 2
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; CHECK-NEXT: and 4, 6, 4
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; CHECK-NEXT: and 3, 3, 5
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; CHECK-NEXT: lis 5, 3855
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: lis 4, -3856
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; CHECK-NEXT: ori 5, 5, 3855
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; CHECK-NEXT: slwi 6, 3, 4
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; CHECK-NEXT: ori 4, 4, 61680
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; CHECK-NEXT: srwi 3, 3, 4
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; CHECK-NEXT: and 4, 6, 4
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; CHECK-NEXT: and 3, 3, 5
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: rotlwi 4, 3, 24
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; CHECK-NEXT: rlwimi 4, 3, 8, 8, 15
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; CHECK-NEXT: rlwimi 4, 3, 8, 24, 31
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; CHECK-NEXT: rldicl 3, 4, 0, 32
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; CHECK-NEXT: blr
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%res = call i32 @llvm.bitreverse.i32(i32 %arg)
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ret i32 %res
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}
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declare i64 @llvm.bitreverse.i64(i64)
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define i64 @testBitReverseIntrinsicI64(i64 %arg) {
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; CHECK-LABEL: testBitReverseIntrinsicI64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lis 4, -21846
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; CHECK-NEXT: lis 5, 21845
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; CHECK-NEXT: lis 6, -13108
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; CHECK-NEXT: lis 7, 13107
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; CHECK-NEXT: sldi 8, 3, 1
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; CHECK-NEXT: rldicl 3, 3, 63, 1
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; CHECK-NEXT: ori 4, 4, 43690
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; CHECK-NEXT: ori 5, 5, 21845
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; CHECK-NEXT: ori 6, 6, 52428
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; CHECK-NEXT: ori 7, 7, 13107
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; CHECK-NEXT: sldi 4, 4, 32
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; CHECK-NEXT: sldi 5, 5, 32
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; CHECK-NEXT: oris 4, 4, 43690
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; CHECK-NEXT: oris 5, 5, 21845
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; CHECK-NEXT: ori 4, 4, 43690
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; CHECK-NEXT: ori 5, 5, 21845
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; CHECK-NEXT: and 4, 8, 4
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; CHECK-NEXT: and 3, 3, 5
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; CHECK-NEXT: sldi 5, 6, 32
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; CHECK-NEXT: sldi 6, 7, 32
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; CHECK-NEXT: lis 7, 3855
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: oris 4, 5, 52428
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; CHECK-NEXT: oris 5, 6, 13107
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; CHECK-NEXT: lis 6, -3856
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; CHECK-NEXT: ori 7, 7, 3855
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; CHECK-NEXT: sldi 8, 3, 2
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; CHECK-NEXT: ori 4, 4, 52428
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; CHECK-NEXT: rldicl 3, 3, 62, 2
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; CHECK-NEXT: ori 5, 5, 13107
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; CHECK-NEXT: ori 6, 6, 61680
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; CHECK-NEXT: and 4, 8, 4
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; CHECK-NEXT: and 3, 3, 5
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; CHECK-NEXT: sldi 5, 6, 32
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; CHECK-NEXT: sldi 6, 7, 32
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: oris 4, 5, 61680
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; CHECK-NEXT: oris 5, 6, 3855
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; CHECK-NEXT: sldi 6, 3, 4
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; CHECK-NEXT: ori 4, 4, 61680
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; CHECK-NEXT: rldicl 3, 3, 60, 4
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; CHECK-NEXT: ori 5, 5, 3855
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; CHECK-NEXT: and 4, 6, 4
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; CHECK-NEXT: and 3, 3, 5
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; CHECK-NEXT: or 3, 3, 4
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; CHECK-NEXT: rldicl 4, 3, 32, 32
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; CHECK-NEXT: rlwinm 5, 3, 24, 0, 31
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; CHECK-NEXT: rlwinm 6, 4, 24, 0, 31
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; CHECK-NEXT: rlwimi 5, 3, 8, 8, 15
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; CHECK-NEXT: rlwimi 5, 3, 8, 24, 31
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; CHECK-NEXT: rlwimi 6, 4, 8, 8, 15
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; CHECK-NEXT: rlwimi 6, 4, 8, 24, 31
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; CHECK-NEXT: sldi 3, 5, 32
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; CHECK-NEXT: or 3, 3, 6
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; CHECK-NEXT: blr
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%res = call i64 @llvm.bitreverse.i64(i64 %arg)
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ret i64 %res
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}
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