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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
25 lines
830 B
LLVM
25 lines
830 B
LLVM
; RUN: llc -verify-machineinstrs %s -mtriple=powerpc64-unknown-linux-gnu -O2 -o - -optimize-regalloc=false -regalloc=fast | FileCheck %s
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declare void @func(i8*, i64, i64)
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define void @test(i8* %context, i32** %elementArrayPtr, i32 %value) {
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entry:
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%cmp = icmp eq i32 %value, 0
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br i1 %cmp, label %lreturn, label %lnext
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lnext:
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%elementArray = load i32*, i32** %elementArrayPtr, align 8
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; CHECK: lwz [[LDREG:[0-9]+]], 124(1) # 4-byte Folded Reload
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; CHECK: # implicit-def: $x[[TEMPREG:[0-9]+]]
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%element = load i32, i32* %elementArray, align 4
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; CHECK: mr [[TEMPREG]], [[LDREG]]
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; CHECK: clrldi 4, [[TEMPREG]], 32
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%element.ext = zext i32 %element to i64
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%value.ext = zext i32 %value to i64
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call void @func(i8* %context, i64 %value.ext, i64 %element.ext)
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br label %lreturn
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lreturn:
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ret void
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}
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