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llvm-mirror/test/CodeGen/Hexagon/packetize-load-store-aliasing.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

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# RUN: llc -march=hexagon -mcpu=hexagonv60 -run-pass hexagon-packetizer %s -o - | FileCheck %s
# Check that a store can be packetized with a load that happens later
# if these instructions are not aliased (the load will actually execute
# first).
# CHECK-LABEL: name: danny
# CHECK: BUNDLE
---
name: danny
tracksRegLiveness: true
stack:
- { id: 0, type: default, size: 4, alignment: 4 }
- { id: 1, type: default, size: 4, alignment: 4 }
body: |
bb.0:
liveins: $r0
S2_storeri_io $r29, 0, $r0 :: (store 4 into %stack.0)
$r1 = L2_loadri_io $r29, 4 :: (load 4 from %stack.1)
...
# Check that a store cannot be packetized with a load that happens later
# if these instructions are aliased.
# CHECK-LABEL: name: sammy
# CHECK-NOT: BUNDLE
# CHECK: S2_storeri_io $r29, 0, $r0
# CHECK: $r1 = L2_loadri_io $r29, 0
---
name: sammy
tracksRegLiveness: true
stack:
- { id: 0, type: default, size: 4, alignment: 4 }
body: |
bb.0:
liveins: $r0
S2_storeri_io $r29, 0, $r0 :: (store 4 into %stack.0)
$r1 = L2_loadri_io $r29, 0 :: (load 4 from %stack.0)
...