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llvm-mirror/lib/Target/AMDGPU/Disassembler
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Matt Arsenault c2c2a10170 AMDGPU: Fix handling of 16-bit immediates 
Since 32-bit instructions with 32-bit input immediate behavior
are used to materialize 16-bit constants in 32-bit registers
for 16-bit instructions, determining the legality based
on the size is incorrect. Change operands to have the size
specified in the type.

Also adds a workaround for a disassembler bug that
produces an immediate MCOperand for an operand that
is supposed to be OPERAND_REGISTER.

The assembler appears to accept out of bounds immediates and
truncates them, but this seems to be an issue for 32-bit
already.

llvm-svn: 289306
2016-12-10 00:39:12 +00:00
..
AMDGPUDisassembler.cpp AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
AMDGPUDisassembler.h AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
CMakeLists.txt [AMDGPU][llvm-mc] s_getreg/setreg* - hwreg - factor out strings/literals etc. 2016-05-26 17:00:33 +00:00
LLVMBuild.txt