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llvm-mirror/test/CodeGen
Chris Dewhurst f418c98924 [SPARC] Fixes for hardware errata on LEON processor.
Passes to fix three hardware errata that appear on some LEON processor variants.

The instructions FSMULD, FMULS and FDIVS do not work as expected on some LEON processors. This change allows those instructions to be substituted for alternatives instruction sequences that are known to work.

These passes only run when selected individually, or as part of a processor defintion. They are not included in general SPARC processor compilations for non-LEON processors or for those LEON processors that do not have these hardware errata.

llvm-svn: 273108
2016-06-19 11:03:28 +00:00
..
AArch64 AArch64: allow MOV (imm) alias to be printed 2016-06-16 01:42:25 +00:00
AMDGPU AMDGPU: Fix kernel argument alignment impacting stack size 2016-06-18 05:15:53 +00:00
ARM ARM: take account of possible bundle when erasing an instruction. 2016-06-17 18:40:46 +00:00
BPF
Generic
Hexagon
Inputs
Lanai
Mips [mips] Emit a JALR with $rd equal to $zero, instead of a JR in MIPS32R6. 2016-06-18 15:39:43 +00:00
MIR [mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores. 2016-06-16 10:20:59 +00:00
MSP430
NVPTX
PowerPC
SPARC [SPARC] Fixes for hardware errata on LEON processor. 2016-06-19 11:03:28 +00:00
SystemZ [SelectionDAG] Don't treat library calls specially if marked with nobuiltin. 2016-06-17 20:24:07 +00:00
Thumb
Thumb2 Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
WebAssembly
WinEH
X86 [X86][AVX] Added test case for PR28136 2016-06-18 22:59:08 +00:00
XCore