1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 12:43:36 +01:00
llvm-mirror/test/MC
Saleem Abdulrasool f56e4f6d3d RISCV: adjust handling of relocation emission for RISCV
This re-architects the RISCV relocation handling to bring the
implementation closer in line with the implementation in binutils.  We
would previously aggressively resolve the relocation.  With this
restructuring, we always will emit a paired relocation for any symbolic
difference of the type of S±T[±C] where S and T are labels and C is a
constant.

GAS has a special target hook controlled by `RELOC_EXPANSION_POSSIBLE`
which indicates that a fixup may be expanded into multiple relocations.
This is used by the RISCV backend to always emit a paired relocation -
either ADD[WIDTH] + SUB[WIDTH] for text relocations or SET[WIDTH] +
SUB[WIDTH] for a debug info relocation.  Irrespective of whether linker
relaxation support is enabled, symbolic difference is always emitted as
a paired relocation.

This change also sinks the target specific behaviour down into the
target specific area rather than exposing it to the shared relocation
handling.  In the process, we also sink the "special" handling for debug
information down into the RISCV target.  Although this improves the path
for the other targets, this is not necessarily entirely ideal either.
The changes in the debug info emission could be done through another
type of hook as this functionality would be required by any other target
which wishes to do linker relaxation.  However, as there are no other
targets in LLVM which currently do this, this is a reasonable thing to
do until such time as the code needs to be shared.

Improve the handling of the relocation (and add a reduced test case from
the Linux kernel) to ensure that we handle complex expressions for
symbolic difference.  This ensures that we correct relocate symbols with
the adddends normalized and associated with the addition portion of the
paired relocation.

This change also addresses some review comments from Alex Bradbury about
the relocations meant for use in the DWARF CFA being named incorrectly
(using ADD6 instead of SET6) in the original change which introduced the
relocation type.

This resolves the issues with the symbolic difference emission
sufficiently to enable building the Linux kernel with clang+IAS+lld
(without linker relaxation).

Resolves PR50153, PR50156!
Fixes: ClangBuiltLinux/linux#1023, ClangBuiltLinux/linux#1143

Reviewed By: nickdesaulniers, maskray

Differential Revision: https://reviews.llvm.org/D103539
2021-06-17 08:20:02 -07:00
..
AArch64 [AArch64] Support llvm-mc/llvm-objdump -M no-aliases 2021-05-26 13:35:31 -07:00
AMDGPU Reland "[AMDGPU] Add gfx1013 target" 2021-06-08 21:15:35 -04:00
ARM Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
AsmParser [MC] Add MCAsmParser::parseComma to improve diagnostics 2021-05-04 14:13:19 -07:00
AVR [AVR] Add register aliases XL, YH, etc 2021-03-03 15:36:05 +01:00
BPF [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
COFF [MC] Change "unexpected tokens" to "expected newline" and remove unneeded "in .xxx directive" 2021-06-02 16:08:05 -07:00
CSKY [CSKY 6/n] Add support branch and symbol series instruction 2021-04-20 15:36:49 +08:00
Disassembler [PowerPC] Export 16 byte load-store instructions 2021-06-15 01:56:10 +00:00
ELF Implement DW_CFA_LLVM_* for Heterogeneous Debugging 2021-06-14 08:51:50 +05:30
Hexagon Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
Lanai
M68k [M68k][test][NFC] Scrubing some tests 2021-05-05 17:48:28 -07:00
MachO Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
Mips [MC] Remove unneeded "in '.xxx' directive" from diagnostics 2021-05-04 13:30:29 -07:00
MSP430 [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
PowerPC [PowerPC] Export 16 byte load-store instructions 2021-06-15 01:56:10 +00:00
RISCV RISCV: adjust handling of relocation emission for RISCV 2021-06-17 08:20:02 -07:00
Sparc [SPARC] recognize the "rd %pc, reg" special form 2021-05-23 22:52:59 +02:00
SystemZ [SystemZ] Introduce distinction between the jg/jl family of mnemonics for GNU as vs HLASM 2021-03-01 16:36:07 -05:00
VE [VE] Add missing BCR format 2020-10-29 23:30:49 +09:00
WebAssembly Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
X86 [X86] Check using default in test added in 0bd5bbb31e0345ae. 2021-06-17 13:19:43 +01:00