Matt Arsenault f658af2617 Teach CodeGenPrepare about address spaces ... llvm-svn: 190112		2013-09-06 00:18:43 +00:00
..
AArch64	Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:	2013-09-04 09:28:24 +00:00
ARM	[ARMv8] Implement the new DMB/DSB operands.	2013-09-05 15:35:24 +00:00
CPP
Generic
Hexagon	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Inputs	Debug Info: add an identifier field to DICompositeType.	2013-08-26 22:39:55 +00:00
Mips	Make sure we don't generate stubs for any of these functions because they	2013-09-01 04:12:59 +00:00
MSP430
NVPTX	[NVPTX] Re-enable assembly printing support for inline assembly	2013-08-24 01:17:23 +00:00
PowerPC	[PowerPC] Call support for fast-isel.	2013-08-30 22:18:55 +00:00
R600	Teach CodeGenPrepare about address spaces	2013-09-06 00:18:43 +00:00
SPARC	[Sparc] Correctly handle call to functions with ReturnsTwice attribute.	2013-09-05 05:32:16 +00:00
SystemZ	[SystemZ] Add NC, OC and XC	2013-09-05 10:36:45 +00:00
Thumb	ARM: Use "dmb sy" for barriers on M-class CPUs	2013-08-28 14:39:19 +00:00
Thumb2	ARM: make sure ARM-mode pseudo-inst requires IsARM	2013-08-23 10:16:39 +00:00
X86	[X86] Perform VSELECT DAG combines also before DAG type legalization.	2013-09-05 23:02:56 +00:00
XCore