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https://github.com/RPCS3/llvm-mirror.git
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c47c44e786
Old expansion was 20 VGPRs, 78 SGPRs and ~380 instructions. This expansion is 11 VGPRs, 12 SGPRs and ~120 instructions. Passes OpenCL conformance test_integer_ops quick_[u]long_math Differential Revision: https://reviews.llvm.org/D38607 llvm-svn: 315081
172 lines
3.7 KiB
LLVM
172 lines
3.7 KiB
LLVM
;RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=GCN --check-prefix=FUNC %s
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;RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefix=VI --check-prefix=GCN --check-prefix=FUNC %s
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;RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s
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;FUNC-LABEL: {{^}}s_test_sdiv:
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;EG: RECIP_UINT
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;EG: LSHL {{.*}}, 1,
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;GCN: v_mac_f32_e32 v{{[0-9]+}}, 0x4f800000,
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;GCN: v_rcp_f32_e32
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;GCN: v_mul_f32_e32 v{{[0-9]+}}, 0x5f7ffffc
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;GCN: v_mul_f32_e32 v{{[0-9]+}}, 0x2f800000
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;GCN: v_trunc_f32_e32
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;GCN: v_mac_f32_e32 v{{[0-9]+}}, 0xcf800000
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;GCN: s_endpgm
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define amdgpu_kernel void @s_test_sdiv(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%result = sdiv i64 %x, %y
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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;FUNC-LABEL: {{^}}s_test_srem:
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;EG: RECIP_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: BFE_UINT
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;EG: AND_INT {{.*}}, 1,
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;GCN: v_mac_f32_e32 v{{[0-9]+}}, 0x4f800000,
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;GCN: v_rcp_f32_e32
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;GCN: v_mul_f32_e32 v{{[0-9]+}}, 0x5f7ffffc
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;GCN: v_mul_f32_e32 v{{[0-9]+}}, 0x2f800000
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;GCN: v_trunc_f32_e32
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;GCN: v_mac_f32_e32 v{{[0-9]+}}, 0xcf800000
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;GCN: s_endpgm
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define amdgpu_kernel void @s_test_srem(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%result = urem i64 %x, %y
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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;FUNC-LABEL: {{^}}test_sdiv3264:
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;EG: RECIP_UINT
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;EG-NOT: BFE_UINT
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;GCN-NOT: s_bfe_u32
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;GCN-NOT: v_mad_f32
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;SI-NOT: v_lshr_b64
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;VI-NOT: v_lshrrev_b64
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;GCN: s_endpgm
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define amdgpu_kernel void @test_sdiv3264(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%1 = ashr i64 %x, 33
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%2 = ashr i64 %y, 33
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%result = sdiv i64 %1, %2
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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;FUNC-LABEL: {{^}}test_srem3264:
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;EG: RECIP_UINT
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;EG-NOT: BFE_UINT
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;GCN-NOT: s_bfe_u32
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;GCN-NOT: v_mad_f32
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;SI-NOT: v_lshr_b64
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;VI-NOT: v_lshrrev_b64
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;GCN: s_endpgm
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define amdgpu_kernel void @test_srem3264(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%1 = ashr i64 %x, 33
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%2 = ashr i64 %y, 33
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%result = srem i64 %1, %2
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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;FUNC-LABEL: {{^}}test_sdiv2464:
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;EG: INT_TO_FLT
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;EG: INT_TO_FLT
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;EG: FLT_TO_INT
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;EG-NOT: RECIP_UINT
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;EG-NOT: BFE_UINT
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;GCN-NOT: s_bfe_u32
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;GCN: v_mad_f32
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;SI-NOT: v_lshr_b64
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;VI-NOT: v_lshrrev_b64
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;GCN: s_endpgm
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define amdgpu_kernel void @test_sdiv2464(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%1 = ashr i64 %x, 40
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%2 = ashr i64 %y, 40
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%result = sdiv i64 %1, %2
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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;FUNC-LABEL: {{^}}test_srem2464:
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;EG: INT_TO_FLT
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;EG: INT_TO_FLT
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;EG: FLT_TO_INT
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;EG-NOT: RECIP_UINT
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;EG-NOT: BFE_UINT
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;GCN-NOT: s_bfe_u32
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;GCN: v_mad_f32
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;SI-NOT: v_lshr_b64
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;VI-NOT: v_lshrrev_b64
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;GCN: s_endpgm
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define amdgpu_kernel void @test_srem2464(i64 addrspace(1)* %out, i64 %x, i64 %y) {
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%1 = ashr i64 %x, 40
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%2 = ashr i64 %y, 40
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%result = srem i64 %1, %2
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store i64 %result, i64 addrspace(1)* %out
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ret void
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}
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