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bd07f66851
This adds a new SystemZ-specific intrinsic, llvm.s390.tdc.f(32|64|128), which maps straight to the test data class instructions. A new IR pass is added to recognize instructions that can be converted to TDC and perform the necessary replacements. Differential Revision: http://reviews.llvm.org/D21949 llvm-svn: 275016
140 lines
3.3 KiB
LLVM
140 lines
3.3 KiB
LLVM
; Test the Test Data Class instruction logic operation conversion from
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; compares.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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declare float @llvm.fabs.f32(float)
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declare double @llvm.fabs.f64(double)
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declare fp128 @llvm.fabs.f128(fp128)
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; Compare with 0 (unworthy)
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define i32 @f1(float %x) {
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; CHECK-LABEL: f1
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; CHECK-NOT: tceb
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; CHECK: ltebr {{%f[0-9]+}}, %f0
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; CHECK-NOT: tceb
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%res = fcmp ugt float %x, 0.0
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs with 0 (unworthy)
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define i32 @f2(float %x) {
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; CHECK-LABEL: f2
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; CHECK-NOT: tceb
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; CHECK: lpebr {{%f[0-9]+}}, %f0
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; CHECK-NOT: tceb
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%y = call float @llvm.fabs.f32(float %x)
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%res = fcmp ugt float %y, 0.0
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare with inf (unworthy)
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define i32 @f3(float %x) {
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; CHECK-LABEL: f3
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; CHECK-NOT: tceb
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; CHECK: ceb %f0, 0(%r{{[0-9]+}})
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; CHECK-NOT: tceb
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%res = fcmp ult float %x, 0x7ff0000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs with inf
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define i32 @f4(float %x) {
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; CHECK-LABEL: f4
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; CHECK: tceb %f0, 4047
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%y = call float @llvm.fabs.f32(float %x)
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%res = fcmp ult float %y, 0x7ff0000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare with minnorm (unworthy)
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define i32 @f5(float %x) {
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; CHECK-LABEL: f5
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; CHECK-NOT: tceb
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; CHECK: ceb %f0, 0(%r{{[0-9]+}})
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; CHECK-NOT: tceb
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%res = fcmp ult float %x, 0x3810000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs with minnorm
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define i32 @f6(float %x) {
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; CHECK-LABEL: f6
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; CHECK: tceb %f0, 3279
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%y = call float @llvm.fabs.f32(float %x)
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%res = fcmp ult float %y, 0x3810000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs with minnorm, unsupported condition
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define i32 @f7(float %x) {
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; CHECK-LABEL: f7
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; CHECK-NOT: tceb
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; CHECK: lpdfr [[REG:%f[0-9]+]], %f0
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; CHECK: ceb [[REG]], 0(%r{{[0-9]+}})
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; CHECK-NOT: tceb
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%y = call float @llvm.fabs.f32(float %x)
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%res = fcmp ugt float %y, 0x3810000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs with unsupported constant
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define i32 @f8(float %x) {
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; CHECK-LABEL: f8
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; CHECK-NOT: tceb
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; CHECK: lpdfr [[REG:%f[0-9]+]], %f0
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; CHECK: ceb [[REG]], 0(%r{{[0-9]+}})
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; CHECK-NOT: tceb
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%y = call float @llvm.fabs.f32(float %x)
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%res = fcmp ult float %y, 0x3ff0000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs with minnorm - double
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define i32 @f9(double %x) {
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; CHECK-LABEL: f9
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; CHECK: tcdb %f0, 3279
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%y = call double @llvm.fabs.f64(double %x)
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%res = fcmp ult double %y, 0x0010000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs with minnorm - long double
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define i32 @f10(fp128 %x) {
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; CHECK-LABEL: f10
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; CHECK: tcxb %f0, 3279
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%y = call fp128 @llvm.fabs.f128(fp128 %x)
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%res = fcmp ult fp128 %y, 0xL00000000000000000001000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs for one with inf - clang's isfinite
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define i32 @f11(double %x) {
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; CHECK-LABEL: f11
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; CHECK: tcdb %f0, 4032
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%y = call double @llvm.fabs.f64(double %x)
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%res = fcmp one double %y, 0x7ff0000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare fabs for oeq with inf - clang's isinf
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define i32 @f12(double %x) {
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; CHECK-LABEL: f12
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; CHECK: tcdb %f0, 48
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%y = call double @llvm.fabs.f64(double %x)
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%res = fcmp oeq double %y, 0x7ff0000000000000
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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