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e87466a278
In case of a SIGN/ZERO_EXTEND of an incomplete vector type (using only a partial number of available vector elements), WidenVecRes_Convert() used to resort to scalarization. This patch adds a handling of the (common) case where an input vector can be found of same width as the widened result vector, by converting the node to SIGN/ZERO_EXTEND_VECTOR_INREG. Review: Eli Friedman llvm-svn: 293268
92 lines
2.1 KiB
LLVM
92 lines
2.1 KiB
LLVM
; Test that vector zexts are done efficently with unpack instructions also in
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; case of fewer elements than allowed, e.g. <2 x i32>.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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define <2 x i16> @fun1(<2 x i8> %val1) {
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; CHECK-LABEL: fun1:
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; CHECK: vuplhb %v24, %v24
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; CHECK-NEXT: br %r14
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%z = zext <2 x i8> %val1 to <2 x i16>
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ret <2 x i16> %z
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}
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define <2 x i32> @fun2(<2 x i8> %val1) {
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; CHECK-LABEL: fun2:
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; CHECK: vuplhb %v0, %v24
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; CHECK-NEXT: vuplhh %v24, %v0
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; CHECK-NEXT: br %r14
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%z = zext <2 x i8> %val1 to <2 x i32>
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ret <2 x i32> %z
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}
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define <2 x i64> @fun3(<2 x i8> %val1) {
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; CHECK-LABEL: fun3:
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; CHECK: vuplhb %v0, %v24
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; CHECK-NEXT: vuplhh %v0, %v0
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; CHECK-NEXT: vuplhf %v24, %v0
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; CHECK-NEXT: br %r14
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%z = zext <2 x i8> %val1 to <2 x i64>
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ret <2 x i64> %z
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}
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define <2 x i32> @fun4(<2 x i16> %val1) {
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; CHECK-LABEL: fun4:
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; CHECK: vuplhh %v24, %v24
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; CHECK-NEXT: br %r14
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%z = zext <2 x i16> %val1 to <2 x i32>
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ret <2 x i32> %z
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}
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define <2 x i64> @fun5(<2 x i16> %val1) {
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; CHECK-LABEL: fun5:
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; CHECK: vuplhh %v0, %v24
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; CHECK-NEXT: vuplhf %v24, %v0
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; CHECK-NEXT: br %r14
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%z = zext <2 x i16> %val1 to <2 x i64>
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ret <2 x i64> %z
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}
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define <2 x i64> @fun6(<2 x i32> %val1) {
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; CHECK-LABEL: fun6:
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; CHECK: vuplhf %v24, %v24
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; CHECK-NEXT: br %r14
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%z = zext <2 x i32> %val1 to <2 x i64>
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ret <2 x i64> %z
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}
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define <4 x i16> @fun7(<4 x i8> %val1) {
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; CHECK-LABEL: fun7:
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; CHECK: vuplhb %v24, %v24
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; CHECK-NEXT: br %r14
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%z = zext <4 x i8> %val1 to <4 x i16>
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ret <4 x i16> %z
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}
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define <4 x i32> @fun8(<4 x i8> %val1) {
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; CHECK-LABEL: fun8:
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; CHECK: vuplhb %v0, %v24
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; CHECK-NEXT: vuplhh %v24, %v0
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; CHECK-NEXT: br %r14
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%z = zext <4 x i8> %val1 to <4 x i32>
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ret <4 x i32> %z
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}
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define <4 x i32> @fun9(<4 x i16> %val1) {
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; CHECK-LABEL: fun9:
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; CHECK: vuplhh %v24, %v24
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; CHECK-NEXT: br %r14
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%z = zext <4 x i16> %val1 to <4 x i32>
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ret <4 x i32> %z
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}
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define <8 x i16> @fun10(<8 x i8> %val1) {
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; CHECK-LABEL: fun10:
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; CHECK: vuplhb %v24, %v24
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; CHECK-NEXT: br %r14
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%z = zext <8 x i8> %val1 to <8 x i16>
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ret <8 x i16> %z
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}
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