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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
63 lines
2.0 KiB
LLVM
63 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
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; tests variable insert and extract of a 4 x i32
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define <4 x i32> @var_insert(<4 x i32> %x, i32 %val, i32 %idx) nounwind {
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; X32-LABEL: var_insert:
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; X32: # %bb.0: # %entry
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; X32-NEXT: pushl %ebp
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: andl $-16, %esp
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; X32-NEXT: subl $32, %esp
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; X32-NEXT: movl 12(%ebp), %eax
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; X32-NEXT: andl $3, %eax
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; X32-NEXT: movl 8(%ebp), %ecx
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; X32-NEXT: movaps %xmm0, (%esp)
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; X32-NEXT: movl %ecx, (%esp,%eax,4)
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; X32-NEXT: movaps (%esp), %xmm0
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; X32-NEXT: movl %ebp, %esp
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: var_insert:
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; X64: # %bb.0: # %entry
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; X64-NEXT: # kill: def $esi killed $esi def $rsi
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; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; X64-NEXT: andl $3, %esi
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; X64-NEXT: movl %edi, -24(%rsp,%rsi,4)
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; X64-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0
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; X64-NEXT: retq
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entry:
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%tmp3 = insertelement <4 x i32> %x, i32 %val, i32 %idx
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ret <4 x i32> %tmp3
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}
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define i32 @var_extract(<4 x i32> %x, i32 %idx) nounwind {
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; X32-LABEL: var_extract:
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; X32: # %bb.0: # %entry
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; X32-NEXT: pushl %ebp
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: andl $-16, %esp
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; X32-NEXT: subl $32, %esp
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; X32-NEXT: movl 8(%ebp), %eax
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; X32-NEXT: andl $3, %eax
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; X32-NEXT: movaps %xmm0, (%esp)
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; X32-NEXT: movl (%esp,%eax,4), %eax
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; X32-NEXT: movl %ebp, %esp
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: var_extract:
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; X64: # %bb.0: # %entry
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; X64-NEXT: andl $3, %edi
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; X64-NEXT: movl -24(%rsp,%rdi,4), %eax
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; X64-NEXT: retq
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entry:
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%tmp3 = extractelement <4 x i32> %x, i32 %idx
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ret i32 %tmp3
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}
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