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https://github.com/RPCS3/llvm-mirror.git
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521d44df2a
Summary: Consider the following diamond CFG: A / \ B C \/ D Suppose A->B and A->C have probabilities 81% and 19%. In block-placement, A->B is called a hot edge and the final placement should be ABDC. However, the current implementation outputs ABCD. This is because when choosing the next block of B, it checks if Freq(C->D) > Freq(B->D) * 20%, which is true (if Freq(A) = 100, then Freq(B->D) = 81, Freq(C->D) = 19, and 19 > 81*20%=16.2). Actually, we should use 25% instead of 20% as the probability here, so that we have 19 < 81*25%=20.25, and the desired ABDC layout will be generated. Reviewers: djasper, davidxl Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D20989 llvm-svn: 272203
91 lines
1.9 KiB
LLVM
91 lines
1.9 KiB
LLVM
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
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; CHECK-LABEL: test_or
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; CHECK: cbnz w0, {{LBB[0-9]+_2}}
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; CHECK: cbz w1, {{LBB[0-9]+_1}}
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define i64 @test_or(i32 %a, i32 %b) {
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bb1:
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%0 = icmp eq i32 %a, 0
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%1 = icmp eq i32 %b, 0
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%or.cond = or i1 %0, %1
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br i1 %or.cond, label %bb3, label %bb4, !prof !0
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bb3:
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ret i64 0
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bb4:
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%2 = call i64 @bar()
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ret i64 %2
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}
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; CHECK-LABEL: test_and
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; CHECK: cbnz w0, {{LBB[0-9]+_2}}
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; CHECK: cbz w1, {{LBB[0-9]+_1}}
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define i64 @test_and(i32 %a, i32 %b) {
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bb1:
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%0 = icmp ne i32 %a, 0
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%1 = icmp ne i32 %b, 0
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%or.cond = and i1 %0, %1
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br i1 %or.cond, label %bb4, label %bb3, !prof !1
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bb3:
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ret i64 0
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bb4:
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%2 = call i64 @bar()
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ret i64 %2
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}
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; If the branch is unpredictable, don't add another branch.
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; CHECK-LABEL: test_or_unpredictable
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; CHECK: cmp w0, #0
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; CHECK-NEXT: cset w8, eq
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: cset w9, eq
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; CHECK-NEXT: orr w8, w8, w9
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; CHECK-NEXT: tbnz w8, #0,
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define i64 @test_or_unpredictable(i32 %a, i32 %b) {
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bb1:
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%0 = icmp eq i32 %a, 0
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%1 = icmp eq i32 %b, 0
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%or.cond = or i1 %0, %1
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br i1 %or.cond, label %bb3, label %bb4, !unpredictable !2
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bb3:
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ret i64 0
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bb4:
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%2 = call i64 @bar()
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ret i64 %2
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}
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; CHECK-LABEL: test_and_unpredictable
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; CHECK: cmp w0, #0
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; CHECK-NEXT: cset w8, ne
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: cset w9, ne
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; CHECK-NEXT: and w8, w8, w9
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; CHECK-NEXT: tbz w8, #0,
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define i64 @test_and_unpredictable(i32 %a, i32 %b) {
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bb1:
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%0 = icmp ne i32 %a, 0
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%1 = icmp ne i32 %b, 0
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%or.cond = and i1 %0, %1
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br i1 %or.cond, label %bb4, label %bb3, !unpredictable !2
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bb3:
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ret i64 0
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bb4:
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%2 = call i64 @bar()
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ret i64 %2
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}
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declare i64 @bar()
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!0 = !{!"branch_weights", i32 5128, i32 32}
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!1 = !{!"branch_weights", i32 1024, i32 4136}
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!2 = !{}
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