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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00
llvm-mirror/test/CodeGen/AArch64
Daniel Sanders 68fde537e1 [globalisel] Decouple src pattern operands from dst pattern operands.
Summary:
This isn't testable for AArch64 by itself so this patch also adds
support for constant immediates in the pattern and physical
register uses in the result.

The new IntOperandMatcher matches the constant in patterns such as
'(set $rd:GPR32, (G_XOR $rs:GPR32, -1))'. It's always safe to fold
immediates into an instruction so this is the first rule that will match
across multiple BB's.

The Renderer hierarchy is responsible for adding operands to the result
instruction. Renderers can copy operands (CopyRenderer) or add physical
registers (in particular %wzr and %xzr) to the result instruction
in any order (OperandMatchers now import the operand names from
SelectionDAG to allow renderers to access any operand). This allows us to
emit the result instruction for:
  %1 = G_XOR %0, -1 --> %1 = ORNWrr %wzr, %0
  %1 = G_XOR -1, %0 --> %1 = ORNWrr %wzr, %0
although the latter is untested since the matcher/importer has not been
taught about commutativity yet.

Added BuildMIAction which can build new instructions and mutate them where
possible. W.r.t the mutation aspect, MatchActions are now told the name of
an instruction they can recycle and BuildMIAction will emit mutation code
when the renderers are appropriate. They are appropriate when all operands
are rendered using CopyRenderer and the indices are the same as the matcher.
This currently assumes that all operands have at least one matcher.

Finally, this change also fixes a crash in
AArch64InstructionSelector::select() caused by an immediate operand
passing isImm() rather than isCImm(). This was uncovered by the other
changes and was detected by existing tests.

Depends on D29711

Reviewers: t.p.northover, ab, qcolombet, rovka, aditya_nandakumar, javed.absar

Reviewed By: rovka

Subscribers: aemerson, dberris, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D29712

llvm-svn: 296131
2017-02-24 15:43:30 +00:00
..
GlobalISel [globalisel] Decouple src pattern operands from dst pattern operands. 2017-02-24 15:43:30 +00:00
128bit_load_store.ll
a57-csel.ll
aarch64_f16_be.ll
aarch64_tree_tests.ll
aarch64-2014-08-11-MachineCombinerCrash.ll
aarch64-2014-12-02-combine-soften.ll
aarch64-a57-fp-load-balancing.ll
aarch64-address-type-promotion-assertion.ll
aarch64-address-type-promotion.ll
aarch64-addv.ll
aarch64-be-bv.ll
aarch64-DAGCombine-findBetterNeighborChains-crash.ll
aarch64-dynamic-stack-layout.ll
aarch64-fix-cortex-a53-835769.ll [llvm] Remove redundant --check-prefix=CHECK from tests 2016-10-24 18:57:55 +00:00
aarch64-gep-opt.ll
aarch64-loop-gep-opt.ll
aarch64-minmaxv.ll
aarch64-neon-v1i1-setcc.ll
aarch64-smax-constantfold.ll
aarch64-smull.ll
aarch64-stp-cluster.ll
aarch64-tbz.ll
aarch64-tryBitfieldInsertOpFromOr-crash.ll
aarch64-vcvtfp2fxs-combine.ll
aarch64-wide-shuffle.ll
aarch-multipart.ll
adc.ll
addsub_ext.ll
addsub-shifted.ll
addsub.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
alloca.ll
analyze-branch.ll
analyzecmp.ll
and-mask-removal.ll
and-sink.ll [CodeGenPrepare] Sink and duplicate more 'and' instructions. 2017-02-21 18:53:14 +00:00
andandshift.ll
argument-blocks.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2017-02-02 18:24:55 +00:00
arm64-2011-03-09-CPSRSpill.ll
arm64-2011-03-17-AsmPrinterCrash.ll Renumber testcase metadata nodes after r290153. 2016-12-22 00:45:21 +00:00
arm64-2011-03-21-Unaligned-Frame-Index.ll
arm64-2011-04-21-CPSRBug.ll
arm64-2011-10-18-LdStOptBug.ll
arm64-2012-01-11-ComparisonDAGCrash.ll
arm64-2012-05-07-DAGCombineVectorExtract.ll
arm64-2012-05-07-MemcpyAlignBug.ll
arm64-2012-05-09-LOADgot-bug.ll
arm64-2012-05-22-LdStOptBug.ll
arm64-2012-06-06-FPToUI.ll
arm64-2012-07-11-InstrEmitterBug.ll
arm64-2013-01-13-ffast-fcmp.ll
arm64-2013-01-23-frem-crash.ll
arm64-2013-01-23-sext-crash.ll
arm64-2013-02-12-shufv8i8.ll
arm64-aapcs-be.ll
arm64-aapcs.ll
arm64-abi_align.ll
arm64-abi-varargs.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
arm64-abi.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2017-02-02 18:24:55 +00:00
arm64-addp.ll
arm64-addr-mode-folding.ll
arm64-addr-type-promotion.ll
arm64-addrmode.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-AdvSIMD-Scalar.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-alloc-no-stack-realign.ll
arm64-alloca-frame-pointer-offset.ll
arm64-andCmpBrToTBZ.ll
arm64-ands-bad-peephole.ll
arm64-AnInfiniteLoopInDAGCombine.ll GlobalISel: rename legalizer components to match others. 2016-10-14 22:18:18 +00:00
arm64-anyregcc-crash.ll
arm64-anyregcc.ll
arm64-arith-saturating.ll
arm64-arith.ll
arm64-arm64-dead-def-elimination-flag.ll
arm64-atomic-128.ll
arm64-atomic.ll CodeGen: Allow small copyable blocks to "break" the CFG. 2017-01-31 23:48:32 +00:00
arm64-basic-pic.ll
arm64-bcc.ll
arm64-big-endian-bitconverts.ll
arm64-big-endian-eh.ll
arm64-big-endian-varargs.ll
arm64-big-endian-vector-callee.ll
arm64-big-endian-vector-caller.ll
arm64-big-imm-offsets.ll
arm64-big-stack.ll
arm64-bitfield-extract.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-blockaddress.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-build-vector.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-builtins-linux.ll
arm64-call-tailcalls.ll
arm64-cast-opt.ll
arm64-ccmp-heuristics.ll
arm64-ccmp.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
arm64-clrsb.ll
arm64-coalesce-ext.ll
arm64-coalescing-MOVi32imm.ll
arm64-code-model-large-abs.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-codegen-prepare-extload.ll [CodeGenPrep]No negative cost in the ExtLd promotion 2017-01-27 17:16:37 +00:00
arm64-collect-loh-garbage-crash.ll AArch64CollectLOH: Rewrite as block-local analysis. 2017-01-06 19:22:01 +00:00
arm64-collect-loh-str.ll AArch64CollectLOH: Rewrite as block-local analysis. 2017-01-06 19:22:01 +00:00
arm64-collect-loh.ll AArch64CollectLOH: Rewrite as block-local analysis. 2017-01-06 19:22:01 +00:00
arm64-complex-copy-noneon.ll
arm64-complex-ret.ll
arm64-const-addr.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-convert-v4f64.ll
arm64-copy-tuple.ll
arm64-crc32.ll
arm64-crypto.ll
arm64-cse.ll
arm64-csel.ll
arm64-csldst-mmo.ll
arm64-cvt.ll
arm64-dagcombiner-convergence.ll
arm64-dagcombiner-dead-indexed-load.ll
arm64-dagcombiner-load-slicing.ll
arm64-dead-def-frame-index.ll
arm64-dead-register-def-bug.ll
arm64-detect-vec-redux.ll
arm64-dup.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-early-ifcvt.ll
arm64-elf-calls.ll
arm64-elf-constpool.ll
arm64-elf-globals.ll
arm64-EXT-undef-mask.ll
arm64-ext.ll
arm64-extend-int-to-fp.ll
arm64-extend.ll
arm64-extern-weak.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-extload-knownzero.ll Codegen: Tail-duplicate during placement. 2016-10-11 20:36:43 +00:00
arm64-extract_subvector.ll
arm64-extract.ll
arm64-fast-isel-addr-offset.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-fast-isel-alloca.ll
arm64-fast-isel-br.ll
arm64-fast-isel-call.ll
arm64-fast-isel-conversion.ll
arm64-fast-isel-fcmp.ll
arm64-fast-isel-gv.ll
arm64-fast-isel-icmp.ll
arm64-fast-isel-indirectbr.ll
arm64-fast-isel-intrinsic.ll
arm64-fast-isel-materialize.ll
arm64-fast-isel-noconvert.ll
arm64-fast-isel-rem.ll
arm64-fast-isel-ret.ll
arm64-fast-isel-store.ll
arm64-fast-isel.ll
arm64-fastcc-tailcall.ll
arm64-fastisel-gep-promote-before-add.ll
arm64-fcmp-opt.ll
arm64-fcopysign.ll
arm64-fixed-point-scalar-cvt-dagcombine.ll
arm64-fma-combine-with-fpfusion.ll
arm64-fma-combines.ll instr-combiner: sum up all latencies of the transformed instructions 2016-12-11 19:39:32 +00:00
arm64-fmadd.ll
arm64-fmax-safe.ll
arm64-fmax.ll
arm64-fminv.ll
arm64-fml-combines.ll
arm64-fmuladd.ll
arm64-fold-address.ll
arm64-fold-lsl.ll
arm64-fp128-folding.ll
arm64-fp128.ll
arm64-fp-contract-zero.ll GlobalISel: rename legalizer components to match others. 2016-10-14 22:18:18 +00:00
arm64-fp-imm.ll
arm64-fp.ll
arm64-frame-index.ll
arm64-global-address.ll
arm64-hello.ll
arm64-i16-subreg-extract.ll
arm64-icmp-opt.ll [DAG] allow more select folding for targets that have 'and not' (PR31175) 2016-12-14 22:59:14 +00:00
arm64-illegal-float-ops.ll
arm64-indexed-memory.ll [AArch64] Simplify indexed-memory testcase. NFC. 2016-12-22 22:27:05 +00:00
arm64-indexed-vector-ldst-2.ll
arm64-indexed-vector-ldst.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-inline-asm-error-I.ll
arm64-inline-asm-error-J.ll
arm64-inline-asm-error-K.ll
arm64-inline-asm-error-L.ll
arm64-inline-asm-error-M.ll
arm64-inline-asm-error-N.ll
arm64-inline-asm-zero-reg-error.ll
arm64-inline-asm.ll Fix some broken CHECK lines. 2017-01-22 20:28:56 +00:00
arm64-join-reserved.ll
arm64-jumptable.ll
arm64-large-frame.ll
arm64-ld1.ll
arm64-ld-from-st.ll
arm64-ldp-aa.ll
arm64-ldp-cluster.ll
arm64-ldp.ll
arm64-ldur.ll
arm64-ldxr-stxr.ll
arm64-leaf.ll
arm64-long-shift.ll
arm64-memcpy-inline.ll
arm64-memset-inline.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2017-02-02 18:24:55 +00:00
arm64-memset-to-bzero.ll
arm64-misaligned-memcpy-inline.ll
arm64-misched-basic-A53.ll [AArch64] Split 0 vector stores into scalar store pairs. 2016-11-14 19:39:04 +00:00
arm64-misched-basic-A57.ll
arm64-misched-forwarding-A53.ll
arm64-misched-memdep-bug.ll
arm64-misched-multimmo.ll
arm64-movi.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
arm64-mul.ll
arm64-named-reg-alloc.ll
arm64-named-reg-notareg.ll
arm64-narrow-st-merge.ll [AArch64] Add test to show narrow zero store merging is disabled with strict align. NFC. 2016-11-11 19:25:48 +00:00
arm64-neg.ll
arm64-neon-2velem-high.ll
arm64-neon-2velem.ll [AArch64] Avoid generating indexed vector instructions for Exynos 2016-10-08 12:30:07 +00:00
arm64-neon-3vdiff.ll
arm64-neon-aba-abd.ll
arm64-neon-across.ll
arm64-neon-add-pairwise.ll
arm64-neon-add-sub.ll
arm64-neon-compare-instructions.ll
arm64-neon-copy.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-neon-copyPhysReg-tuple.ll
arm64-neon-mul-div.ll
arm64-neon-scalar-by-elem-mul.ll
arm64-neon-select_cc.ll
arm64-neon-simd-ldst-one.ll
arm64-neon-simd-shift.ll
arm64-neon-simd-vget.ll
arm64-neon-v1i1-setcc.ll
arm64-neon-v8.1a.ll [AArch64] Falkor supports Rounding Double Multiply Add/Subtract instructions. 2017-01-16 16:28:43 +00:00
arm64-neon-vector-list-spill.ll
arm64-nvcast.ll DAG: Avoid OOB when legalizing vector indexing 2017-01-10 22:02:30 +00:00
arm64-opt-remarks-lazy-bfi.ll [LazyMachineBFI] Add testcase 2017-02-24 01:22:55 +00:00
arm64-patchpoint-scratch-regs.ll
arm64-patchpoint-webkit_jscc.ll MCStreamer: Use "cfi" for CFI related temp labels. 2016-11-30 23:48:26 +00:00
arm64-patchpoint.ll
arm64-pic-local-symbol.ll
arm64-platform-reg.ll
arm64-popcnt.ll
arm64-prefetch.ll
arm64-promote-const.ll
arm64-redzone.ll
arm64-reg-copy-noneon.ll
arm64-register-offset-addressing.ll
arm64-register-pairing.ll
arm64-regress-f128csel-flags.ll
arm64-regress-interphase-shift.ll
arm64-regress-opt-cmp.mir MIRTests: Remove unnecessary 2>&1 redirection 2017-02-22 18:47:41 +00:00
arm64-return-vector.ll
arm64-returnaddr.ll
arm64-rev.ll
arm64-rounding.ll
arm64-scaled_iv.ll
arm64-scvt.ll
arm64-setcc-int-to-fp-combine.ll
arm64-shifted-sext.ll
arm64-shrink-v1i64.ll
arm64-shrink-wrapping.ll CodeGen: Allow small copyable blocks to "break" the CFG. 2017-01-31 23:48:32 +00:00
arm64-simd-scalar-to-vector.ll
arm64-simplest-elf.ll
arm64-sincos.ll
arm64-sitofp-combine-chains.ll
arm64-sli-sri-opt.ll
arm64-smaxv.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-sminv.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-spill-lr.ll
arm64-spill-remarks.ll [llc] Add -pass-remarks-output 2017-01-26 00:39:51 +00:00
arm64-spill.ll
arm64-sqshl-uqshl-i64Contant.ll
arm64-st1.ll
arm64-stack-no-frame.ll
arm64-stackmap-nops.ll
arm64-stackmap.ll
arm64-stackpointer.ll
arm64-stacksave.ll
arm64-stp-aa.ll
arm64-stp.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-strict-align.ll
arm64-stur.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-10-13 20:23:25 +00:00
arm64-subsections.ll GlobalISel: rename legalizer components to match others. 2016-10-14 22:18:18 +00:00
arm64-subvector-extend.ll
arm64-summary-remarks.ll OptDiag: Add test for r296053 2017-02-24 01:13:09 +00:00
arm64-swizzle-tbl-i16-layout.ll
arm64-tbl.ll
arm64-this-return.ll
arm64-tls-darwin.ll
arm64-tls-dynamic-together.ll
arm64-tls-dynamics.ll
arm64-tls-execs.ll
arm64-trap.ll
arm64-triv-disjoint-mem-access.ll
arm64-trn.ll
arm64-trunc-store.ll
arm64-umaxv.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-uminv.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-umov.ll
arm64-unaligned_ldst.ll
arm64-uzp.ll
arm64-vaargs.ll
arm64-vabs.ll
arm64-vadd.ll
arm64-vaddlv.ll
arm64-vaddv.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-variadic-aapcs.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2017-02-02 18:24:55 +00:00
arm64-vbitwise.ll
arm64-vclz.ll
arm64-vcmp.ll
arm64-vcnt.ll
arm64-vcombine.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-vcvt_f32_su32.ll
arm64-vcvt_f.ll
arm64-vcvt_n.ll
arm64-vcvt_su32_f32.ll
arm64-vcvt.ll
arm64-vcvtxd_f32_f64.ll
arm64-vecCmpBr.ll
arm64-vecFold.ll
arm64-vector-ext.ll
arm64-vector-imm.ll
arm64-vector-insertion.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
arm64-vector-ldst.ll
arm64-vext_reverse.ll
arm64-vext.ll
arm64-vfloatintrinsics.ll
arm64-vhadd.ll
arm64-vhsub.ll
arm64-virtual_base.ll
arm64-vmax.ll
arm64-vminmaxnm.ll
arm64-vmovn.ll
arm64-vmul.ll
arm64-volatile.ll
arm64-vpopcnt.ll
arm64-vqadd.ll
arm64-vqsub.ll
arm64-vselect.ll
arm64-vsetcc_fp.ll
arm64-vshift.ll
arm64-vshr.ll
arm64-vshuffle.ll
arm64-vsqrt.ll
arm64-vsra.ll
arm64-vsub.ll
arm64-weak-reference.ll
arm64-xaluo.ll
arm64-zero-cycle-regmov.ll
arm64-zero-cycle-zeroing.ll [AArch64] Update the feature set for Qualcomm's Falkor CPU. 2017-01-04 21:26:23 +00:00
arm64-zeroreg.ll AArch64: Use DeadRegisterDefinitionsPass before regalloc. 2016-11-16 03:38:27 +00:00
arm64-zext.ll
arm64-zextload-unscaled.ll
arm64-zip.ll
asm-large-immediate.ll
assertion-rc-mismatch.ll
atomic-ops-not-barriers.ll
atomic-ops.ll
basic-pic.ll
bics.ll [AArch64] allow and-not-compare transform to form 'bics' 2016-11-29 22:28:58 +00:00
bitcast-v2i8.ll
bitcast.ll
bitfield-extract.ll
bitfield-insert-0.ll
bitfield-insert.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
bitfield.ll
bitreverse.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
blockaddress.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
bool-loads.ll
br-cond-not-merge.ll [SelectionDAG] Fix bugs in inverted condition splitting code. 2017-02-09 18:28:17 +00:00
br-to-eh-lpad.ll
br-undef-cond.ll
branch-folder-merge-mmos.ll
branch-relax-alignment.ll GlobalISel: rename legalizer components to match others. 2016-10-14 22:18:18 +00:00
branch-relax-asm.ll
branch-relax-bcc.ll
branch-relax-cbz.ll Codegen: Make chains from trellis-shaped CFGs 2017-02-15 19:49:14 +00:00
breg.ll
bswap-known-bits.ll
callee-save.ll
cmp-const-max.ll
cmpwithshort.ll
cmpxchg-idioms.ll
cmpxchg-O0.ll AArch64: fix 128-bit cmpxchg at -O0 (again, again). 2016-12-01 21:31:59 +00:00
code-model-large-abs.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
combine-comparisons-by-cse.ll Codegen: Make chains from trellis-shaped CFGs 2017-02-15 19:49:14 +00:00
compare-branch.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
compiler-ident.ll
complex-copy-noneon.ll
complex-fp-to-int.ll
complex-int-to-fp.ll
concat_vector-scalar-combine.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
concat_vector-truncate-combine.ll
concat_vector-truncated-scalar-combine.ll
cond-sel-value-prop.ll Fix test from r285217. 2016-10-26 18:49:16 +00:00
cond-sel.ll
cpus.ll Add support for Samsung Exynos M3 (NFC) 2016-12-13 23:31:41 +00:00
csel-zero-float.ll [AArch64] Fix incorrect CSEL node created 2016-11-08 13:34:41 +00:00
cxx-tlscc.ll
dag-combine-invaraints.ll
dag-combine-mul-shl.ll [DAGCombiner] Fix infinite loop in vector mul/shl combining 2016-11-23 16:05:51 +00:00
dag-combine-select.ll
directcond.ll
div_minsize.ll
divrem.ll
dont-take-over-the-world.ll
dp1.ll
dp2.ll
dp-3source.ll
eliminate-trunc.ll [LSR] Recommit: Allow formula containing Reg for SCEVAddRecExpr related with outerloop. 2017-02-11 00:50:23 +00:00
emutls_generic.ll
emutls.ll
eon.ll
extern-weak.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
extract.ll
f16-convert.ll
f16-instructions.ll
fast-isel-address-extends.ll
fast-isel-addressing-modes.ll
fast-isel-assume.ll
fast-isel-atomic.ll
fast-isel-branch_weights.ll
fast-isel-branch-cond-mask.ll
fast-isel-branch-cond-split.ll
fast-isel-call-return.ll
fast-isel-cbz.ll
fast-isel-cmp-branch.ll
fast-isel-cmp-vec.ll
fast-isel-cmpxchg.ll
fast-isel-folded-shift.ll
fast-isel-folding.ll
fast-isel-gep.ll
fast-isel-int-ext2.ll
fast-isel-int-ext3.ll
fast-isel-int-ext4.ll
fast-isel-int-ext5.ll
fast-isel-int-ext.ll
fast-isel-intrinsic.ll
fast-isel-logic-op.ll
fast-isel-memcpy.ll
fast-isel-mul.ll
fast-isel-runtime-libcall.ll
fast-isel-sdiv.ll
fast-isel-select.ll
fast-isel-shift.ll
fast-isel-sqrt.ll
fast-isel-switch-phi.ll
fast-isel-tbz.ll [CodeGenPrepare] Sink and duplicate more 'and' instructions. 2017-02-21 18:53:14 +00:00
fast-isel-trunc.ll
fast-isel-vector-arithmetic.ll
fast-isel-vret.ll
fastcc-reserved.ll
fastcc.ll
fcmp.ll
fcopysign.ll
fcsel-zero.ll [AArch64] Fix test triplet 2016-10-18 20:41:30 +00:00
fcvt_combine.ll
fcvt-fixed.ll
fcvt-int.ll
fdiv_combine.ll
fdiv-combine.ll
flags-multiuse.ll
floatdp_1source.ll
floatdp_2source.ll
fold-constants.ll
fp16-v4-instructions.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
fp16-v8-instructions.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
fp16-v16-instructions.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
fp16-vector-bitcast.ll
fp16-vector-load-store.ll
fp16-vector-nvcast.ll
fp16-vector-shuffle.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
fp128-folding.ll
fp-cond-sel.ll
fp-dp3.ll
fpconv-vector-op-scalarize.ll
fpimm.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
fptouint-i8-zext.ll [Legalizer] Fix fp-to-uint to fp-tosint promotion assertion. 2017-01-04 22:11:42 +00:00
frameaddr.ll
free-zext.ll
func-argpassing.ll
func-calls.ll
funcptr_cast.ll
function-subtarget-features.ll
gep-nullptr.ll
ghc-cc.ll
global-alignment.ll
global-merge-1.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
global-merge-2.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
global-merge-3.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
global-merge-4.ll
global-merge-group-by-use.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
global-merge-ignore-single-use-minsize.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
global-merge-ignore-single-use.ll Revert "Use private linkage for MergedGlobals variables" on Darwin. 2016-11-11 17:50:09 +00:00
global-merge.ll
got-abuse.ll
half.ll
hints.ll
i1-contents.ll
i128-align.ll
i128-fast-isel-fallback.ll
ifcvt-select.ll
illegal-float-ops.ll
implicit-sret.ll
init-array.ll
inline-asm-constraints-badI.ll
inline-asm-constraints-badK2.ll
inline-asm-constraints-badK.ll
inline-asm-constraints-badL.ll
inline-asm-globaladdress.ll
inlineasm-ldr-pseudo.ll
inlineasm-X-allocation.ll
inlineasm-X-constraint.ll
intrinsics-memory-barrier.ll
jump-table.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
large_shift.ll
large-consts.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
ldp-stp-scaled-unscaled-pairs.ll
ldst-opt-zr-clobber.mir Move .mir tests to appropriate directories 2016-12-09 19:08:15 +00:00
ldst-opt.ll [SelectionDAG] In InstrEmitter, handle EXTRACT_SUBREG of a physical register. 2017-02-05 18:28:14 +00:00
ldst-opt.mir MIRTests: Remove unnecessary 2>&1 redirection 2017-02-22 18:47:41 +00:00
ldst-paired-aliasing.ll [AArch64] Split 0 vector stores into scalar store pairs. 2016-11-14 19:39:04 +00:00
ldst-regoffset.ll
ldst-unscaledimm.ll
ldst-unsignedimm.ll
ldst-zero.ll [AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat 2017-02-06 18:07:20 +00:00
legalize-bug-bogus-cpu.ll
lit.local.cfg
literal_pools_float.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
live-interval-analysis.mir LiveIntervalAnalysis: Calculate liveness even if a superreg is reserved. 2017-01-24 01:12:58 +00:00
load-combine-big-endian.ll [DAGCombiner] revert r295336 2017-02-22 16:27:33 +00:00
load-combine.ll [DAGCombiner] revert r295336 2017-02-22 16:27:33 +00:00
local_vars.ll
logical_shifted_reg.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
logical-imm.ll
loh.mir AArch64CollectLOH: Rewrite as block-local analysis. 2017-01-06 19:22:01 +00:00
lower-range-metadata-func-call.ll
machine_cse_impdef_killflags.ll ScheduleDAGInstrs: Ignore dependencies of constant physregs 2016-11-10 23:46:44 +00:00
machine_cse.ll Codegen: Tail-duplicate during placement. 2016-10-11 20:36:43 +00:00
machine-combiner-madd.ll remove pretty-print test that requires debug 2016-12-21 03:37:39 +00:00
machine-combiner.ll
machine-copy-prop.ll
machine-copy-remove.ll
machine-copy-remove.mir [AArch64] Extend AArch64RedundantCopyElimination to do simple copy propagation. 2017-02-22 19:10:45 +00:00
machine-dead-copy.mir Move .mir tests to appropriate directories 2016-12-09 19:08:15 +00:00
machine-scheduler.mir CodeGen: Assert that liveness is up to date when reading block live-ins. 2017-01-05 20:01:19 +00:00
machine-sink-kill-flags.ll
machine-sink-zr.mir Move .mir tests to appropriate directories 2016-12-09 19:08:15 +00:00
madd-combiner.ll
madd-lohi.ll
mature-mc-support.ll [LLC] Add an inline assembly diagnostics handler. 2017-02-03 11:14:39 +00:00
max-jump-table.ll Add option to specify minimum number of entries for jump tables 2016-10-25 19:53:51 +00:00
memcpy-f128.ll
merge-store-dependency.ll
merge-store.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2017-02-02 18:24:55 +00:00
min-jump-table.ll Add option to specify minimum number of entries for jump tables 2016-10-25 19:53:51 +00:00
minmax.ll
misched-fusion-aes.ll [AArch64] Add test case for fusion of AES crypto operations 2017-02-21 22:16:06 +00:00
misched-fusion-lit.ll [AArch64] Add test case for fusion of literal generation 2017-02-21 22:16:09 +00:00
misched-fusion.ll [CodeGen] Move MacroFusion to the target 2017-02-01 02:54:34 +00:00
misched-stp.ll [AArch64] Fix incorrect MachinePointerInfo in splitStoreSplat 2017-02-06 18:07:20 +00:00
movimm-wzr.mir MIRTests: Remove unnecessary 2>&1 redirection 2017-02-22 18:47:41 +00:00
movw-consts.ll
movw-shift-encoding.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
mul_pow2.ll [AArch64] Lower multiplication by a constant int to shl+add+shl 2016-11-15 20:16:48 +00:00
mul-lohi.ll instr-combiner: sum up all latencies of the transformed instructions 2016-12-11 19:39:32 +00:00
neg-imm.ll ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() 2016-11-11 01:34:21 +00:00
neon-bitcast.ll
neon-bitwise-instructions.ll
neon-compare-instructions.ll
neon-diagnostics.ll
neon-extract.ll
neon-fma.ll
neon-fpround_f128.ll
neon-idiv.ll
neon-inline-asm-16-bit-fp.ll This patch adds support for 16 bit floating point registers to the inline asm register selection on AArch64. 2016-11-07 15:42:12 +00:00
neon-mla-mls.ll
neon-mov.ll
neon-or-combine.ll
neon-perm.ll
neon-scalar-by-elem-fma.ll
neon-scalar-copy.ll
neon-shift-left-long.ll
neon-truncStore-extLoad.ll
nest-register.ll
no-quad-ldp-stp.ll [AArch64] Rename 'no-quad-ldst-pairs' to 'slow-paired-128' 2017-01-24 17:34:31 +00:00
nontemporal.ll
nzcv-save.ll
optimize-cond-branch.ll Codegen: Make chains from trellis-shaped CFGs 2017-02-15 19:49:14 +00:00
or-combine.ll
paired-load.ll
PBQP-chain.ll
PBQP-coalesce-benefit.ll
PBQP-csr.ll
PBQP.ll
phi-dbg.ll
pic-eh-stubs.ll
pie.ll
postra-mi-sched.ll
preferred-alignment.ll
preserve_mostcc.ll
print-mrs-system-register.ll
ragreedy-csr.ll
rbit.ll [AArch64] Add support for lowering bitreverse to the rbit instruction. 2017-01-10 17:20:33 +00:00
readcyclecounter.ll
recp-fastmath.ll [AArch64] Compute the Newton series for reciprocals natively 2016-11-14 23:29:01 +00:00
redundant-copy-elim-empty-mbb.ll
Redundantstore.ll
regcoal-physreg.mir RegisterCoalescer: Fix joinReservedPhysReg() 2017-02-07 01:59:39 +00:00
regress-bitcast-formals.ll
regress-f128csel-flags.ll
regress-fp128-livein.ll
regress-tail-livereg.ll
regress-tblgen-chains.ll Fix some broken CHECK lines. 2017-01-22 20:28:56 +00:00
regress-w29-reserved-with-fp.ll
rem_crash.ll
remat-float0.ll
remat.ll Add support for Samsung Exynos M3 (NFC) 2016-12-13 23:31:41 +00:00
returnaddr.ll
rm_redundant_cmp.ll
rotate.ll
round-conv.ll
sched-past-vector-ldst.ll [AArch64] Transfer memory operands when lowering vector load/store intrinsics 2016-11-07 22:39:02 +00:00
scheduledag-constreg.mir ScheduleDAGInstrs: Ignore dependencies of constant physregs 2016-11-10 23:46:44 +00:00
sdivpow2.ll
selectcc-to-shiftand.ll [DAG] allow more select folding for targets that have 'and not' (PR31175) 2016-12-14 22:59:14 +00:00
selectiondag-order.ll [DAG] Don't increase SDNodeOrder for dbg.value/declare. 2017-01-19 13:55:55 +00:00
setcc-takes-i32.ll
setcc-type-mismatch.ll
shrink-wrap.ll
sibling-call.ll
simple-macho.ll GlobalISel: rename legalizer components to match others. 2016-10-14 22:18:18 +00:00
sincos-expansion.ll
sincospow-vector-expansion.ll
sitofp-fixed-legal.ll
special-reg.ll
spill-fold.ll [AArch64] Fold more spilled/refilled COPYs. 2016-12-01 23:43:55 +00:00
sqrt-fastmath.ll [AArch64] Compute the Newton series for reciprocals natively 2016-11-14 23:29:01 +00:00
stack_guard_remat.ll [AArch64] Generate literals by the little end 2017-01-18 18:57:08 +00:00
stack-guard-remat-bitcast.ll
stack-protector-target.ll [Fuchsia] Use thread-pointer ABI slots for stack-protector and safe-stack 2017-02-24 03:10:10 +00:00
stackmap-frame-setup.ll
stackmap-liveness.ll
store_merge_pair_offset.ll [AArch64] Fix over-eager early-exit in load-store combiner 2017-01-04 21:21:46 +00:00
subs-to-sub-opt.ll ScheduleDAGInstrs: Ignore dependencies of constant physregs 2016-11-10 23:46:44 +00:00
swift-return.ll More swift calling convention tests 2016-10-28 17:21:05 +00:00
swiftcc.ll
swifterror.ll swiftcc: Don't emit tail calls from callers with swifterror parameters 2017-02-13 19:58:28 +00:00
swiftself.ll [ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns' 2017-02-08 22:30:47 +00:00
tail-call.ll
tailcall_misched_graph.ll
tailcall-ccmismatch.ll
tailcall-explicit-sret.ll
tailcall-fastisel.ll
tailcall-implicit-sret.ll
tailcall-mem-intrinsics.ll
tailmerging_in_mbp.ll
tbi.ll
tbz-tbnz.ll CodeGen: Allow small copyable blocks to "break" the CFG. 2017-01-31 23:48:32 +00:00
trunc-v1i64.ll
tst-br.ll
vcvt-oversize.ll
vector_merge_dep_check.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2017-02-02 18:24:55 +00:00
vector-fcopysign.ll Revert r294437 as it broke an asan buildbot. 2017-02-08 21:41:16 +00:00
xbfiz.ll
xray-attribute-instrumentation.ll [XRay][AArch64] Implemented a test for the compile-time sleds emitted, and fixed a bug in the jump instruction 2016-11-21 03:01:43 +00:00
xray-tail-call-sled.ll [XRay][AArch64] More staging for tail call support in XRay on AArch64 - in LLVM 2017-01-25 20:21:49 +00:00
zero-reg.ll [AArch64] Fold more spilled/refilled COPYs. 2016-12-01 23:43:55 +00:00