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e37295579e
Software pipelining is an optimization for improving ILP by overlapping loop iterations. Swing Modulo Scheduling (SMS) is an implementation of software pipelining that attempts to reduce register pressure and generate efficient pipelines with a low compile-time cost. This implementaion of SMS is a target-independent back-end pass. When enabled, the pass should run just prior to the register allocation pass, while the machine IR is in SSA form. If the pass is successful, then the original loop is replaced by the optimized loop. The optimized loop contains one or more prolog blocks, the pipelined kernel, and one or more epilog blocks. This pass is enabled for Hexagon only. To enable for other targets, a couple of target specific hooks must be implemented, and the pass needs to be called from the target's TargetMachine implementation. Differential Review: http://reviews.llvm.org/D16829 llvm-svn: 277169
42 lines
1.6 KiB
LLVM
42 lines
1.6 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv5 -enable-pipeliner < %s | FileCheck %s
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; RUN: llc -march=hexagon -mcpu=hexagonv5 -O2 < %s | FileCheck %s
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; RUN: llc -march=hexagon -mcpu=hexagonv5 -O3 < %s | FileCheck %s
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;
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; Check that we pipeline a vectorized dot product in a single packet.
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;
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; CHECK: {
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; CHECK: += mpyi
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; CHECK: += mpyi
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; CHECK: memd
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; CHECK: memd
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; CHECK: } :endloop0
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@a = common global [5000 x i32] zeroinitializer, align 8
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@b = common global [5000 x i32] zeroinitializer, align 8
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define i32 @vecMultGlobal() {
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entry:
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br label %polly.loop_body
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polly.loop_after:
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%0 = extractelement <2 x i32> %addp_vec, i32 0
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%1 = extractelement <2 x i32> %addp_vec, i32 1
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%add_sum = add i32 %0, %1
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ret i32 %add_sum
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polly.loop_body:
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%polly.loopiv13 = phi i32 [ 0, %entry ], [ %polly.next_loopiv, %polly.loop_body ]
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%reduction.012 = phi <2 x i32> [ zeroinitializer, %entry ], [ %addp_vec, %polly.loop_body ]
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%polly.next_loopiv = add nsw i32 %polly.loopiv13, 2
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%p_arrayidx1 = getelementptr [5000 x i32], [5000 x i32]* @b, i32 0, i32 %polly.loopiv13
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%p_arrayidx = getelementptr [5000 x i32], [5000 x i32]* @a, i32 0, i32 %polly.loopiv13
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%vector_ptr = bitcast i32* %p_arrayidx1 to <2 x i32>*
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%_p_vec_full = load <2 x i32>, <2 x i32>* %vector_ptr, align 8
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%vector_ptr7 = bitcast i32* %p_arrayidx to <2 x i32>*
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%_p_vec_full8 = load <2 x i32>, <2 x i32>* %vector_ptr7, align 8
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%mulp_vec = mul <2 x i32> %_p_vec_full8, %_p_vec_full
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%addp_vec = add <2 x i32> %mulp_vec, %reduction.012
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%2 = icmp slt i32 %polly.next_loopiv, 5000
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br i1 %2, label %polly.loop_body, label %polly.loop_after
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}
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