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9091dc1c0e
We were previously codegen'ing memcpy as regular load/store operations and hoping that the register allocator would allocate registers in ascending order so that we could apply an LDM/STM combine after register allocation. According to the commit that first introduced this code (r37179), we planned to teach the register allocator to allocate the registers in ascending order. This never got implemented, and up to now we've been stuck with very poor codegen. A much simpler approach for achieving better codegen is to create MEMCPY pseudo instructions, attach scratch virtual registers to them and then, post register allocation, expand the MEMCPYs into LDM/STM pairs using the scratch registers. The register allocator will have picked arbitrary registers which we sort when expanding the MEMCPY. This approach also avoids the need to repeatedly calculate offsets which ultimately ought to be eliminated pre-RA in order to decrease register pressure. Fixes PR9199 and PR23768. [This is based on Peter Collingbourne's r238473 which was reverted.] Differential Revision: http://reviews.llvm.org/D13239 Change-Id: I727543c2e94136e0f80b8e22d5642d7b9ee5b458 Author: Peter Collingbourne <peter@pcc.me.uk> llvm-svn: 249322
94 lines
3.9 KiB
LLVM
94 lines
3.9 KiB
LLVM
; RUN: llc -mattr=-neon < %s -verify-machineinstrs -o - | FileCheck %s
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target triple = "thumbv7a-none--eabi"
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@a = external global i32*
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@b = external global i32*
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; Function Attrs: nounwind
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define void @foo24() #0 {
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entry:
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; CHECK-LABEL: foo24:
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; We use '[rl0-9]*' to allow 'r0'..'r12', 'lr'
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add{{s?}}{{(\.w)?}} [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: adds [[SB]], #4
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; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R5:[rl0-9]+]], [[R6:[rl0-9]+]]}
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 24, i32 4, i1 false)
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ret void
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}
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define void @foo28() #0 {
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entry:
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; CHECK-LABEL: foo28:
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add{{(\.w)?}} [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: adds [[SB]], #4
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; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]]}
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]]}
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; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 28, i32 4, i1 false)
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ret void
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}
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define void @foo32() #0 {
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entry:
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; CHECK-LABEL: foo32:
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add{{(\.w)?}} [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: adds [[SB]], #4
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; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
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; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 32, i32 4, i1 false)
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ret void
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}
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define void @foo36() #0 {
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entry:
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; CHECK-LABEL: foo36:
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; CHECK: movt [[LB:[rl0-9]+]], :upper16:b
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; CHECK: movt [[SB:[rl0-9]+]], :upper16:a
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; CHECK: add{{(\.w)?}} [[NLB:[rl0-9]+]], [[LB]], #4
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; CHECK: adds [[SB]], #4
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; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
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; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R5:[rl0-9]+]]}
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]]}
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%0 = load i32*, i32** @a, align 4
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%arrayidx = getelementptr inbounds i32, i32* %0, i32 1
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%1 = bitcast i32* %arrayidx to i8*
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%2 = load i32*, i32** @b, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %2, i32 1
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%3 = bitcast i32* %arrayidx1 to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %3, i32 36, i32 4, i1 false)
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ret void
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}
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; Function Attrs: nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1
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