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0eb872067d
This re-applies r268760, reverted in r268794. Fixes http://llvm.org/PR27670 The original imp-defs assertion was way overzealous: forward all implicit operands, except imp-defs of the new super-reg def (r268787 for GR64, but also possible for GR16->GR32), or imp-uses of the new super-reg use. While there, mark the source use as Undef, and add an imp-use of the old source reg: that should cover any case of dead super-regs. At the stage the pass runs, flags are unlikely to matter anyway; still, let's be as correct as possible. Also add MIR tests for the various interesting cases. Original commit message: Codesize is less (16) or equal (8), and we avoid partial dependencies. Differential Revision: http://reviews.llvm.org/D19999 llvm-svn: 268831
71 lines
2.1 KiB
LLVM
71 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 --check-prefix=BWON64 %s
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; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 --check-prefix=BWOFF64 %s
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; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=i386-- < %s | FileCheck --check-prefix=X32 --check-prefix=BWON32 %s
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; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=i386-- < %s | FileCheck --check-prefix=X32 --check-prefix=BWOFF32 %s
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target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
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define i8 @test_movb(i8 %a0) {
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; BWON64-LABEL: test_movb:
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; BWON64: # BB#0:
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; BWON64-NEXT: movl %edi, %eax
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; BWON64-NEXT: retq
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;
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; BWOFF64-LABEL: test_movb:
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; BWOFF64: # BB#0:
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; BWOFF64-NEXT: movb %dil, %al
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; BWOFF64-NEXT: retq
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;
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; X32-LABEL: test_movb:
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; X32: # BB#0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: retl
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ret i8 %a0
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}
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define i16 @test_movw(i16 %a0) {
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; BWON64-LABEL: test_movw:
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; BWON64: # BB#0:
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; BWON64-NEXT: movl %edi, %eax
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; BWON64-NEXT: retq
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;
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; BWOFF64-LABEL: test_movw:
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; BWOFF64: # BB#0:
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; BWOFF64-NEXT: movw %di, %ax
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; BWOFF64-NEXT: retq
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;
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; BWON32-LABEL: test_movw:
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; BWON32: # BB#0:
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; BWON32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; BWON32-NEXT: retl
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;
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; BWOFF32-LABEL: test_movw:
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; BWOFF32: # BB#0:
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; BWOFF32-NEXT: movw {{[0-9]+}}(%esp), %ax
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; BWOFF32-NEXT: retl
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ret i16 %a0
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}
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; Verify we don't mess with H-reg copies (only generated in 32-bit mode).
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define i8 @test_movb_hreg(i16 %a0) {
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; X64-LABEL: test_movb_hreg:
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; X64: # BB#0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shrl $8, %eax
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; X64-NEXT: addb %dil, %al
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; X64-NEXT: retq
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;
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; X32-LABEL: test_movb_hreg:
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; X32: # BB#0:
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: addb %al, %ah
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; X32-NEXT: movb %ah, %al
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; X32-NEXT: retl
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%tmp0 = trunc i16 %a0 to i8
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%tmp1 = lshr i16 %a0, 8
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%tmp2 = trunc i16 %tmp1 to i8
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%tmp3 = add i8 %tmp0, %tmp2
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ret i8 %tmp3
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}
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