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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
44 lines
838 B
YAML
44 lines
838 B
YAML
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-sink -o - %s | FileCheck %s
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--- |
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define void @sinkwzr() { ret void }
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...
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---
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name: sinkwzr
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr32 }
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- { id: 1, class: gpr32 }
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- { id: 2, class: gpr32sp }
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- { id: 3, class: gpr32 }
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- { id: 4, class: gpr32 }
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body: |
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; Check that WZR copy is sunk into the loop preheader.
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; CHECK-LABEL: name: sinkwzr
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; CHECK-LABEL: bb.0:
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; CHECK-NOT: COPY $wzr
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bb.0:
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liveins: $w0
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%0 = COPY $w0
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%1 = COPY $wzr
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CBZW %0, %bb.3
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; CHECK-LABEL: bb.1:
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; CHECK: COPY $wzr
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bb.1:
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B %bb.2
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bb.2:
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%2 = PHI %0, %bb.1, %4, %bb.2
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$w0 = COPY %1
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%3 = SUBSWri %2, 1, 0, implicit-def dead $nzcv
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%4 = COPY %3
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CBZW %3, %bb.3
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B %bb.2
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bb.3:
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RET_ReallyLR
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...
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