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db3c93e416
This will remove suboptimal branching from the generated ll/sc loops. The extra simplification pass affects a lot of testcases, which have been modified to accommodate this change: either by modifying the test to become immune to the CFG simplification, or (less preferablt) by adding option -hexagon-initial-cfg-clenaup=0. llvm-svn: 338774
31 lines
1.0 KiB
LLVM
31 lines
1.0 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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target triple = "hexagon"
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; CHECK-LABEL: danny:
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; CHECK: vunpack
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; CHECK-NOT: vinsert
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define void @danny(<16 x i16>* %a0, <16 x i32>* %a1) #0 {
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b2:
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%v16 = load <16 x i16>, <16 x i16>* %a0, align 128
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%v17 = sext <16 x i16> %v16 to <16 x i32>
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store <16 x i32> %v17, <16 x i32>* %a1, align 128
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ret void
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}
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; CHECK-LABEL: sammy:
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; CHECK: vunpack
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; CHECK-NOT: vinsert
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define void @sammy(<32 x i16>* %a0, <32 x i32>* %a1) #1 {
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b2:
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%v16 = load <32 x i16>, <32 x i16>* %a0, align 128
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%v17 = sext <32 x i16> %v16 to <32 x i32>
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store <32 x i32> %v17, <32 x i32>* %a1, align 128
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ret void
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}
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attributes #0 = { noinline norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }
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attributes #1 = { noinline norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx-length128b,+hvxv60" }
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