1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00
llvm-mirror/test/CodeGen/Hexagon/expand-condsets-imm.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

22 lines
471 B
YAML

# RUN: llc -march=hexagon -run-pass expand-condsets %s -o - | FileCheck %s
# Check that we can expand a mux with a global as an immediate operand.
# CHECK: C2_cmoveif undef %0:predregs, @G
--- |
@G = global i32 0, align 4
define void @fred() { ret void }
...
---
name: fred
tracksRegLiveness: true
registers:
- { id: 0, class: predregs }
- { id: 1, class: intregs }
body: |
bb.1:
%1 = IMPLICIT_DEF
%1 = C2_muxir undef %0, %1, @G
$r0 = COPY %1
...