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1b5e161992
ARMv8.2-A adds a new PSTATE bit, PSTATE.UAO, which allows the LDTR/STTR instructions to behave the same as LDR/STR with respect to execute-only pages at higher privilege levels. New variants of the MSR/MRS instructions are added to allow reading and writing this bit. It is a required part of ARMv8.2-A, so no additional subtarget features are required. Differential Revision: http://reviews.llvm.org/D15020 llvm-svn: 254157
18 lines
668 B
ArmAsm
18 lines
668 B
ArmAsm
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.2a < %s 2> %t | FileCheck %s
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// RUN: FileCheck --check-prefix=CHECK-ERROR %s < %t
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msr uao, #0
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msr uao, #1
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// CHECK: msr UAO, #0 // encoding: [0x7f,0x40,0x00,0xd5]
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// CHECK: msr UAO, #1 // encoding: [0x7f,0x41,0x00,0xd5]
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msr uao, #2
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// CHECK-ERROR: error: immediate must be an integer in range [0, 1].
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// CHECK-ERROR: msr uao, #2
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// CHECK-ERROR: ^
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msr uao, x1
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mrs x2, uao
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// CHECK: msr UAO, x1 // encoding: [0x81,0x42,0x18,0xd5]
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// CHECK: mrs x2, UAO // encoding: [0x82,0x42,0x38,0xd5]
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