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This patch adds support for the following new instructions in the Power ISA 2.07: vpksdss vpksdus vpkudus vpkudum vupkhsw vupklsw These instructions are available through the vec_packs, vec_packsu, vec_unpackh, and vec_unpackl built-in interfaces. These are lane-sensitive instructions, so the built-ins have different implementations for big- and little-endian, and the instructions must be marked as killing the vector swap optimization for now. The first three instructions perform saturating pack operations. The fourth performs a modulo pack operation, which means it can be represented with a vector shuffle, and conversely the appropriate vector shuffles may cause this instruction to be generated. The other instructions are only generated via built-in support for now. Appropriate tests have been added. There is a companion patch to clang for the rest of this support. llvm-svn: 237499
20 lines
362 B
Plaintext
20 lines
362 B
Plaintext
# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr8 | FileCheck %s
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# CHECK: vpksdss 2, 3, 4
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0x10 0x43 0x25 0xce
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# CHECK: vpksdus 2, 3, 4
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0x10 0x43 0x25 0x4e
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# CHECK: vpkudus 2, 3, 4
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0x10 0x43 0x24 0xce
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# CHECK: vpkudum 2, 3, 4
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0x10 0x43 0x24 0x4e
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# CHECK: vupkhsw 2, 3
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0x10 0x40 0x1e 0x4e
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# CHECK: vupklsw 2, 3
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0x10 0x40 0x1e 0xce
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