mirror of
https://github.com/RPCS3/llvm-mirror.git
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cc12b285b6
This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted all of the tests already, but likely missed a few). Not sure what the exact syntax and policy should be. We can continue printing the number of bytes for non-generic instructions to avoid test churn and only allow non-scalar types for generic instructions. This will currently print the LLT in parentheses, but accept parsing the existing integers and implicitly converting to scalar. The parentheses are a bit ugly, but the parser logic seems unable to deal without either parentheses or some keyword to indicate the start of a type.
471 lines
22 KiB
YAML
471 lines
22 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=si-peephole-sdwa -verify-machineinstrs -o - %s | FileCheck -check-prefix=VI -check-prefix=GFX89 -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-peephole-sdwa -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 -check-prefix=GFX89 -check-prefix=GCN %s
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# GFX89-LABEL: {{^}}name: vop1_instructions
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_sdwa 0, %{{[0-9]+}}, 0, 5, 0, 5, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_FRACT_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $mode, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_SIN_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, implicit $mode, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_U32_F32_sdwa 0, %{{[0-9]+}}, 0, 5, 0, 5, implicit $mode, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_F32_I32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $mode, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_sdwa 0, %{{[0-9]+}}, 0, 6, 0, 5, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_FRACT_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $mode, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_SIN_F32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, implicit $mode, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_U32_F32_sdwa 0, %{{[0-9]+}}, 0, 5, 0, 5, implicit $mode, implicit $exec
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# GFX89: %{{[0-9]+}}:vgpr_32 = V_CVT_F32_I32_sdwa 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_FRACT_F32_sdwa 1, %{{[0-9]+}}, 0, 0, 5, 0, 5, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_SIN_F32_sdwa 0, %{{[0-9]+}}, 1, 0, 5, 0, 5, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_CVT_U32_F32_sdwa 1, %{{[0-9]+}}, 0, 5, 0, 5, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_CVT_F32_I32_e64 %{{[0-9]+}}, 0, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_FRACT_F32_sdwa 1, %{{[0-9]+}}, 0, 0, 5, 0, 5, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_SIN_F32_sdwa 0, %{{[0-9]+}}, 1, 0, 5, 0, 5, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_CVT_U32_F32_sdwa 1, %{{[0-9]+}}, 0, 5, 0, 5, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_CVT_F32_I32_sdwa 0, %{{[0-9]+}}, 0, 1, 5, 0, 5, implicit $mode, implicit $exec
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---
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name: vop1_instructions
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vreg_64 }
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- { id: 1, class: vreg_64 }
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- { id: 2, class: sreg_64 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: sreg_32_xm0 }
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- { id: 5, class: sreg_32_xm0 }
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- { id: 6, class: sreg_32_xm0 }
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- { id: 7, class: sreg_32_xm0 }
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- { id: 8, class: sreg_32 }
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- { id: 9, class: vgpr_32 }
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- { id: 10, class: vgpr_32 }
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- { id: 11, class: vgpr_32 }
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- { id: 12, class: vgpr_32 }
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- { id: 13, class: vgpr_32 }
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- { id: 14, class: vgpr_32 }
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- { id: 15, class: vgpr_32 }
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- { id: 16, class: vgpr_32 }
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- { id: 17, class: vgpr_32 }
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- { id: 18, class: vgpr_32 }
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- { id: 19, class: vgpr_32 }
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- { id: 20, class: vgpr_32 }
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- { id: 21, class: vgpr_32 }
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- { id: 22, class: vgpr_32 }
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- { id: 23, class: vgpr_32 }
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- { id: 24, class: vgpr_32 }
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- { id: 25, class: vgpr_32 }
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- { id: 26, class: vgpr_32 }
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- { id: 27, class: vgpr_32 }
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- { id: 28, class: vgpr_32 }
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- { id: 29, class: vgpr_32 }
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- { id: 30, class: vgpr_32 }
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- { id: 31, class: vgpr_32 }
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- { id: 32, class: vgpr_32 }
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- { id: 33, class: vgpr_32 }
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- { id: 34, class: vgpr_32 }
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- { id: 35, class: vgpr_32 }
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- { id: 36, class: vgpr_32 }
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- { id: 37, class: vgpr_32 }
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- { id: 38, class: vgpr_32 }
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- { id: 39, class: vgpr_32 }
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- { id: 40, class: vgpr_32 }
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- { id: 41, class: vgpr_32 }
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- { id: 42, class: vgpr_32 }
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- { id: 43, class: vgpr_32 }
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- { id: 44, class: vgpr_32 }
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- { id: 45, class: vgpr_32 }
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- { id: 46, class: vgpr_32 }
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- { id: 47, class: vgpr_32 }
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- { id: 48, class: vgpr_32 }
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- { id: 100, class: vgpr_32 }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $sgpr30_sgpr31
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%2 = COPY $sgpr30_sgpr31
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%1 = COPY $vgpr2_vgpr3
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%0 = COPY $vgpr0_vgpr1
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%3 = FLAT_LOAD_DWORD %1, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32))
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%5 = S_MOV_B32 65535
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%6 = S_MOV_B32 65535
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%10 = V_LSHRREV_B32_e64 16, %3, implicit $exec
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%11 = V_MOV_B32_e32 %10, implicit $exec
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%12 = V_LSHLREV_B32_e64 16, %11, implicit $exec
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%14 = V_FRACT_F32_e32 123, implicit $mode, implicit $exec
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%15 = V_LSHLREV_B32_e64 16, %14, implicit $exec
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%16 = V_LSHRREV_B32_e64 16, %15, implicit $exec
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%17 = V_SIN_F32_e32 %16, implicit $mode, implicit $exec
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%18 = V_LSHLREV_B32_e64 16, %17, implicit $exec
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%19 = V_LSHRREV_B32_e64 16, %18, implicit $exec
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%20 = V_CVT_U32_F32_e32 %19, implicit $mode, implicit $exec
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%21 = V_LSHLREV_B32_e64 16, %20, implicit $exec
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%23 = V_CVT_F32_I32_e32 123, implicit $mode, implicit $exec
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%24 = V_LSHLREV_B32_e64 16, %23, implicit $exec
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%25 = V_LSHRREV_B32_e64 16, %3, implicit $exec
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%26 = V_MOV_B32_e64 %25, implicit $exec
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%26 = V_LSHLREV_B32_e64 16, %26, implicit $exec
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%27 = V_FRACT_F32_e64 0, %6, 0, 0, implicit $mode, implicit $exec
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%28 = V_LSHLREV_B32_e64 16, %27, implicit $exec
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%29 = V_LSHRREV_B32_e64 16, %28, implicit $exec
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%30 = V_SIN_F32_e64 0, %29, 0, 0, implicit $mode, implicit $exec
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%31 = V_LSHLREV_B32_e64 16, %30, implicit $exec
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%32 = V_LSHRREV_B32_e64 16, %31, implicit $exec
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%33 = V_CVT_U32_F32_e64 0, %32, 0, 0, implicit $mode, implicit $exec
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%34 = V_LSHLREV_B32_e64 16, %33, implicit $exec
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%35 = V_CVT_F32_I32_e64 %6, 0, 0, implicit $mode, implicit $exec
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%36 = V_LSHLREV_B32_e64 16, %35, implicit $exec
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%37 = V_LSHRREV_B32_e64 16, %36, implicit $exec
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%38 = V_FRACT_F32_e64 1, %37, 0, 0, implicit $mode, implicit $exec
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%39 = V_LSHLREV_B32_e64 16, %38, implicit $exec
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%40 = V_LSHRREV_B32_e64 16, %39, implicit $exec
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%41 = V_SIN_F32_e64 0, %40, 1, 0, implicit $mode, implicit $exec
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%42 = V_LSHLREV_B32_e64 16, %41, implicit $exec
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%43 = V_LSHRREV_B32_e64 16, %42, implicit $exec
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%44 = V_CVT_U32_F32_e64 1, %43, 0, 0, implicit $mode, implicit $exec
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%45 = V_LSHLREV_B32_e64 16, %44, implicit $exec
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%46 = V_LSHRREV_B32_e64 16, %45, implicit $exec
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%47 = V_CVT_F32_I32_e64 %46, 0, 1, implicit $mode, implicit $exec
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%48 = V_LSHLREV_B32_e64 16, %47, implicit $exec
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%100 = V_MOV_B32_e32 %48, implicit $exec
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FLAT_STORE_DWORD %0, %100, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))
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$sgpr30_sgpr31 = COPY %2
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S_SETPC_B64_return $sgpr30_sgpr31
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...
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---
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# GCN-LABEL: {{^}}name: vop2_instructions
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# VI: %{{[0-9]+}}:vgpr_32 = V_AND_B32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 5, 0, 6, 5, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_ADD_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_SUB_F16_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 6, 0, 5, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_MAC_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, %{{[0-9]+}}, 0, 0, 6, 0, 6, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_MAC_F16_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, %{{[0-9]+}}, 0, 0, 6, 0, 5, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_AND_B32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 5, 0, 6, 5, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_ADD_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_SUB_F16_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 6, 0, 5, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_MAC_F32_e32 %{{[0-9]+}}, %{{[0-9]+}}, %{{[0-9]+}}, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_MAC_F16_e32 %{{[0-9]+}}, %{{[0-9]+}}, %{{[0-9]+}}, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_AND_B32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 5, 0, 6, 5, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_ADD_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_SUB_F16_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_MAC_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, %{{[0-9]+}}, 0, 0, 6, 0, 6, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_MAC_F16_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, %{{[0-9]+}}, 0, 0, 6, 0, 5, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_AND_B32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 5, 0, 6, 5, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_ADD_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 5, 0, 5, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_SUB_F16_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, 5, 0, 6, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_MAC_F32_e64 0, 23, 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_MAC_F16_e64 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 0, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_ADD_F32_sdwa 0, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 0, 5, 0, 5, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_SUB_F16_sdwa 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 0, 5, 0, 6, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_MAC_F32_sdwa 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, %{{[0-9]+}}, 1, 0, 6, 0, 6, 1, implicit $mode, implicit $exec
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# VI: %{{[0-9]+}}:vgpr_32 = V_MAC_F16_e64 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 2, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_ADD_F32_sdwa 0, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 0, 5, 0, 5, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_SUB_F16_sdwa 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 0, 5, 0, 6, 1, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_MAC_F32_e64 1, 23, 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 1, 0, implicit $mode, implicit $exec
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# GFX9: %{{[0-9]+}}:vgpr_32 = V_MAC_F16_e64 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 2, implicit $mode, implicit $exec
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name: vop2_instructions
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tracksRegLiveness: true
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registers:
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- { id: 0, class: vreg_64 }
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- { id: 1, class: vreg_64 }
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- { id: 2, class: sreg_64 }
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- { id: 3, class: vgpr_32 }
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- { id: 4, class: sreg_32_xm0 }
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- { id: 5, class: sreg_32_xm0 }
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- { id: 6, class: sreg_32_xm0 }
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- { id: 7, class: sreg_32_xm0 }
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- { id: 8, class: sreg_32 }
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- { id: 9, class: vgpr_32 }
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- { id: 10, class: vgpr_32 }
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- { id: 11, class: vgpr_32 }
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- { id: 12, class: vgpr_32 }
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- { id: 13, class: vgpr_32 }
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- { id: 14, class: vgpr_32 }
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- { id: 15, class: vgpr_32 }
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- { id: 16, class: vgpr_32 }
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- { id: 17, class: vgpr_32 }
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- { id: 18, class: vgpr_32 }
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- { id: 19, class: vgpr_32 }
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- { id: 20, class: vgpr_32 }
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- { id: 21, class: vgpr_32 }
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- { id: 22, class: vgpr_32 }
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- { id: 23, class: vgpr_32 }
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- { id: 24, class: vgpr_32 }
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- { id: 25, class: vgpr_32 }
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- { id: 26, class: vgpr_32 }
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- { id: 27, class: vgpr_32 }
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- { id: 28, class: vgpr_32 }
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- { id: 29, class: vgpr_32 }
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- { id: 30, class: vgpr_32 }
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- { id: 31, class: vgpr_32 }
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- { id: 32, class: vgpr_32 }
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- { id: 33, class: vgpr_32 }
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- { id: 34, class: vgpr_32 }
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- { id: 35, class: vgpr_32 }
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- { id: 36, class: vgpr_32 }
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- { id: 37, class: vgpr_32 }
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- { id: 38, class: vgpr_32 }
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- { id: 39, class: vgpr_32 }
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- { id: 40, class: vgpr_32 }
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- { id: 41, class: vgpr_32 }
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- { id: 42, class: vgpr_32 }
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- { id: 43, class: vgpr_32 }
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- { id: 44, class: vgpr_32 }
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- { id: 45, class: vgpr_32 }
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- { id: 46, class: vgpr_32 }
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- { id: 47, class: vgpr_32 }
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- { id: 48, class: vgpr_32 }
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- { id: 49, class: vgpr_32 }
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- { id: 50, class: vgpr_32 }
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- { id: 51, class: vgpr_32 }
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- { id: 52, class: vgpr_32 }
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- { id: 53, class: vgpr_32 }
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- { id: 54, class: vgpr_32 }
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- { id: 55, class: vgpr_32 }
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- { id: 56, class: vgpr_32 }
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- { id: 57, class: vgpr_32 }
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- { id: 58, class: vgpr_32 }
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- { id: 59, class: vgpr_32 }
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- { id: 60, class: vgpr_32 }
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- { id: 100, class: vgpr_32 }
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $sgpr30_sgpr31
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%2 = COPY $sgpr30_sgpr31
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%1 = COPY $vgpr2_vgpr3
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%0 = COPY $vgpr0_vgpr1
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%3 = FLAT_LOAD_DWORD %1, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32))
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%5 = S_MOV_B32 65535
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%6 = S_MOV_B32 65535
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%11 = V_LSHRREV_B32_e64 16, %3, implicit $exec
|
|
%12 = V_AND_B32_e32 %6, %11, implicit $exec
|
|
%13 = V_LSHLREV_B32_e64 16, %12, implicit $exec
|
|
%14 = V_LSHRREV_B32_e64 16, %13, implicit $exec
|
|
%15 = V_BFE_U32_e64 %13, 8, 8, implicit $exec
|
|
%16 = V_ADD_F32_e32 %14, %15, implicit $mode, implicit $exec
|
|
%17 = V_LSHLREV_B32_e64 16, %16, implicit $exec
|
|
%18 = V_LSHRREV_B32_e64 16, %17, implicit $exec
|
|
%19 = V_BFE_U32_e64 %17, 8, 8, implicit $exec
|
|
%20 = V_SUB_F16_e32 %18, %19, implicit $mode, implicit $exec
|
|
%21 = V_LSHLREV_B32_e64 16, %20, implicit $exec
|
|
%22 = V_BFE_U32_e64 %20, 8, 8, implicit $exec
|
|
%23 = V_MAC_F32_e32 %21, %22, %22, implicit $mode, implicit $exec
|
|
%24 = V_LSHLREV_B32_e64 16, %23, implicit $exec
|
|
%25 = V_LSHRREV_B32_e64 16, %24, implicit $exec
|
|
%26 = V_BFE_U32_e64 %24, 8, 8, implicit $exec
|
|
%27 = V_MAC_F16_e32 %25, %26, %26, implicit $mode, implicit $exec
|
|
%28 = V_LSHLREV_B32_e64 16, %27, implicit $exec
|
|
|
|
%29 = V_LSHRREV_B32_e64 16, %28, implicit $exec
|
|
%30 = V_AND_B32_e64 23, %29, implicit $exec
|
|
%31 = V_LSHLREV_B32_e64 16, %30, implicit $exec
|
|
%32 = V_LSHRREV_B32_e64 16, %31, implicit $exec
|
|
%33 = V_BFE_U32_e64 %31, 8, 8, implicit $exec
|
|
%34 = V_ADD_F32_e64 0, %32, 0, %33, 0, 0, implicit $mode, implicit $exec
|
|
%35 = V_LSHLREV_B32_e64 16, %34, implicit $exec
|
|
%37 = V_BFE_U32_e64 %35, 8, 8, implicit $exec
|
|
%38 = V_SUB_F16_e64 0, 23, 0, %37, 0, 0, implicit $mode, implicit $exec
|
|
%39 = V_LSHLREV_B32_e64 16, %38, implicit $exec
|
|
%40 = V_BFE_U32_e64 %39, 8, 8, implicit $exec
|
|
%41 = V_MAC_F32_e64 0, 23, 0, %40, 0, %40, 0, 0, implicit $mode, implicit $exec
|
|
%42 = V_LSHLREV_B32_e64 16, %41, implicit $exec
|
|
%43 = V_LSHRREV_B32_e64 16, %42, implicit $exec
|
|
%44 = V_BFE_U32_e64 %42, 8, 8, implicit $exec
|
|
%45 = V_MAC_F16_e64 0, %43, 0, %44, 0, %44, 0, 0, implicit $mode, implicit $exec
|
|
%46 = V_LSHLREV_B32_e64 16, %45, implicit $exec
|
|
|
|
%47 = V_LSHRREV_B32_e64 16, %46, implicit $exec
|
|
%48 = V_BFE_U32_e64 %46, 8, 8, implicit $exec
|
|
%49 = V_ADD_F32_e64 0, %47, 1, %48, 0, 0, implicit $mode, implicit $exec
|
|
%50 = V_LSHLREV_B32_e64 16, %49, implicit $exec
|
|
%51 = V_BFE_U32_e64 %50, 8, 8, implicit $exec
|
|
%52 = V_SUB_F16_e64 1, 23, 1, %51, 0, 0, implicit $mode, implicit $exec
|
|
%53 = V_LSHLREV_B32_e64 16, %52, implicit $exec
|
|
%54 = V_BFE_U32_e64 %53, 8, 8, implicit $exec
|
|
%55 = V_MAC_F32_e64 1, 23, 1, %54, 1, %54, 1, 0, implicit $mode, implicit $exec
|
|
%56 = V_LSHLREV_B32_e64 16, %55, implicit $exec
|
|
%57 = V_LSHRREV_B32_e64 16, %56, implicit $exec
|
|
%58 = V_BFE_U32_e64 %56, 8, 8, implicit $exec
|
|
%59 = V_MAC_F16_e64 1, %57, 1, %58, 1, %58, 0, 2, implicit $mode, implicit $exec
|
|
%60 = V_LSHLREV_B32_e64 16, %59, implicit $exec
|
|
|
|
%100 = V_MOV_B32_e32 %60, implicit $exec
|
|
|
|
FLAT_STORE_DWORD %0, %100, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))
|
|
$sgpr30_sgpr31 = COPY %2
|
|
S_SETPC_B64_return $sgpr30_sgpr31
|
|
|
|
...
|
|
---
|
|
|
|
# GCN-LABEL: {{^}}name: vopc_instructions
|
|
|
|
# GFX89: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32 123, implicit $exec
|
|
# GFX89: $vcc = V_CMP_EQ_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit $mode, implicit $exec
|
|
# GFX89: $vcc = V_CMPX_GT_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# GFX89: $vcc = V_CMP_LT_I32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit $exec
|
|
# GFX89: $vcc = V_CMPX_EQ_I32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $exec
|
|
|
|
|
|
# VI: $vcc = V_CMP_EQ_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit $mode, implicit $exec
|
|
# VI: %{{[0-9]+}}:sreg_64 = V_CMPX_GT_F32_e64 0, 23, 0, killed %{{[0-9]+}}, 0, implicit-def $exec, implicit $mode, implicit $exec
|
|
# VI: $vcc = V_CMP_LT_I32_sdwa 0, %{{[0-9]+}}, 0, %3, 0, 6, 4, implicit $exec
|
|
# VI: %{{[0-9]+}}:sreg_64 = V_CMPX_EQ_I32_e64 23, killed %{{[0-9]+}}, implicit-def $exec, implicit $exec
|
|
|
|
# GFX9: $vcc = V_CMP_EQ_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit $mode, implicit $exec
|
|
# GFX9: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
|
|
# GFX9: %{{[0-9]+}}:sreg_64 = V_CMPX_GT_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# GFX9: $vcc = V_CMP_LT_I32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit $exec
|
|
# GFX9: %{{[0-9]+}}:vgpr_32 = V_MOV_B32_e32 23, implicit $exec
|
|
# GFX9: %{{[0-9]+}}:sreg_64 = V_CMPX_EQ_I32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $exec
|
|
|
|
|
|
# VI: $vcc = V_CMP_EQ_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 1, 6, 4, implicit $mode, implicit $exec
|
|
# VI: $vcc = V_CMPX_GT_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# VI: $vcc = V_CMP_EQ_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 1, 6, 4, implicit $mode, implicit $exec
|
|
# VI: $vcc = V_CMPX_GT_F32_sdwa 1, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# VI: $vcc = V_CMPX_GT_F32_sdwa 0, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# VI: $vcc = V_CMPX_GT_F32_sdwa 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# VI: $vcc = V_CMPX_GT_F32_sdwa 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 1, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
|
|
# GFX9: $vcc = V_CMP_EQ_F32_e64 0, %{{[0-9]+}}, 0, killed %{{[0-9]+}}, 1, implicit $mode, implicit $exec
|
|
# GFX9: $vcc = V_CMPX_GT_F32_sdwa 0, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# GFX9: $vcc = V_CMP_EQ_F32_e64 0, %{{[0-9]+}}, 0, killed %{{[0-9]+}}, 1, implicit $mode, implicit $exec
|
|
# GFX9: $vcc = V_CMPX_GT_F32_sdwa 1, %{{[0-9]+}}, 0, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# GFX9: $vcc = V_CMPX_GT_F32_sdwa 0, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# GFX9: $vcc = V_CMPX_GT_F32_sdwa 1, %{{[0-9]+}}, 1, %{{[0-9]+}}, 0, 6, 4, implicit-def $exec, implicit $mode, implicit $exec
|
|
# GFX9: $vcc = V_CMPX_GT_F32_e64 1, 23, 1, killed %{{[0-9]+}}, 1, implicit-def $exec, implicit $mode, implicit $exec
|
|
|
|
|
|
name: vopc_instructions
|
|
tracksRegLiveness: true
|
|
registers:
|
|
- { id: 0, class: vreg_64 }
|
|
- { id: 1, class: vreg_64 }
|
|
- { id: 2, class: sreg_64 }
|
|
- { id: 3, class: vgpr_32 }
|
|
- { id: 4, class: sreg_32_xm0 }
|
|
- { id: 5, class: sreg_32_xm0 }
|
|
- { id: 6, class: sreg_32_xm0 }
|
|
- { id: 7, class: sreg_32_xm0 }
|
|
- { id: 8, class: sreg_32 }
|
|
- { id: 9, class: vgpr_32 }
|
|
- { id: 10, class: vgpr_32 }
|
|
- { id: 11, class: vgpr_32 }
|
|
- { id: 12, class: vgpr_32 }
|
|
- { id: 13, class: vgpr_32 }
|
|
- { id: 14, class: vgpr_32 }
|
|
- { id: 15, class: vgpr_32 }
|
|
- { id: 16, class: vgpr_32 }
|
|
- { id: 17, class: vgpr_32 }
|
|
- { id: 18, class: sreg_64 }
|
|
- { id: 19, class: sreg_64 }
|
|
- { id: 20, class: vgpr_32 }
|
|
- { id: 21, class: vgpr_32 }
|
|
- { id: 22, class: vgpr_32 }
|
|
- { id: 23, class: vgpr_32 }
|
|
- { id: 24, class: vgpr_32 }
|
|
- { id: 25, class: vgpr_32 }
|
|
- { id: 26, class: vgpr_32 }
|
|
- { id: 27, class: vgpr_32 }
|
|
- { id: 100, class: vgpr_32 }
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $sgpr30_sgpr31
|
|
|
|
%2 = COPY $sgpr30_sgpr31
|
|
%1 = COPY $vgpr2_vgpr3
|
|
%0 = COPY $vgpr0_vgpr1
|
|
%3 = FLAT_LOAD_DWORD %1, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32))
|
|
|
|
%5 = S_MOV_B32 65535
|
|
%6 = S_MOV_B32 65535
|
|
|
|
%10 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
V_CMP_EQ_F32_e32 123, killed %10, implicit-def $vcc, implicit $mode, implicit $exec
|
|
%11 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
V_CMPX_GT_F32_e32 123, killed %11, implicit-def $vcc, implicit $mode, implicit-def $exec, implicit $exec
|
|
%12 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
V_CMP_LT_I32_e32 123, killed %12, implicit-def $vcc, implicit $exec
|
|
%13 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
V_CMPX_EQ_I32_e32 123, killed %13, implicit-def $vcc, implicit-def $exec, implicit $exec
|
|
|
|
%14 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMP_EQ_F32_e64 0, %6, 0, killed %14, 0, implicit $mode, implicit $exec
|
|
%15 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
%18 = V_CMPX_GT_F32_e64 0, 23, 0, killed %15, 0, implicit-def $exec, implicit $mode, implicit $exec
|
|
%16 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMP_LT_I32_e64 %6, killed %16, implicit $exec
|
|
%17 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
%19 = V_CMPX_EQ_I32_e64 23, killed %17, implicit-def $exec, implicit $exec
|
|
|
|
%20 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMP_EQ_F32_e64 0, %6, 0, killed %20, 1, implicit $mode, implicit $exec
|
|
%21 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMPX_GT_F32_e64 0, 23, 0, killed %21, 0, implicit-def $exec, implicit $mode, implicit $exec
|
|
%23 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMP_EQ_F32_e64 0, %6, 0, killed %23, 1, implicit $mode, implicit $exec
|
|
%24 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMPX_GT_F32_e64 1, 23, 0, killed %24, 0, implicit-def $exec, implicit $mode, implicit $exec
|
|
%25 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMPX_GT_F32_e64 0, 23, 1, killed %25, 0, implicit-def $exec, implicit $mode, implicit $exec
|
|
%26 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMPX_GT_F32_e64 1, 23, 1, killed %26, 0, implicit-def $exec, implicit $mode, implicit $exec
|
|
%27 = V_AND_B32_e64 %5, %3, implicit $exec
|
|
$vcc = V_CMPX_GT_F32_e64 1, 23, 1, killed %27, 1, implicit-def $exec, implicit $mode, implicit $exec
|
|
|
|
|
|
%100 = V_MOV_B32_e32 $vcc_lo, implicit $exec
|
|
|
|
FLAT_STORE_DWORD %0, %100, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))
|
|
$sgpr30_sgpr31 = COPY %2
|
|
S_SETPC_B64_return $sgpr30_sgpr31
|
|
...
|
|
|
|
# GCN-LABEL: name: preserve_flags
|
|
# GCN: = nnan nofpexcept V_ADD_F32_sdwa 0, %4, 0, %4, 0, 0, 6, 0, 5, 1, implicit $mode, implicit $exec
|
|
|
|
---
|
|
name: preserve_flags
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
|
|
%0:vgpr_32 = COPY $vgpr0
|
|
%1:sreg_32 = S_MOV_B32 65535
|
|
%2:vgpr_32 = V_LSHRREV_B32_e64 16, %0, implicit $exec
|
|
%3:vgpr_32 = V_AND_B32_e32 %1, %2, implicit $exec
|
|
%4:vgpr_32 = V_LSHLREV_B32_e64 16, %3, implicit $exec
|
|
%5:vgpr_32 = V_LSHRREV_B32_e64 16, %4, implicit $exec
|
|
%6:vgpr_32 = V_BFE_U32_e64 %4, 8, 8, implicit $exec
|
|
%7:vgpr_32 = nnan nofpexcept V_ADD_F32_e32 %5, %6, implicit $mode, implicit $exec
|
|
S_ENDPGM 0, implicit %7
|
|
|
|
...
|