mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 03:02:36 +01:00
6765229853
This patch adds the new system registers introduced in SME:
- ID_AA64SMFR0_EL1 (ro) SME feature identifier.
- SMCR_ELx (r/w) streaming mode control register for configuring
effective SVE Streaming SVE Vector length when the PE is in
Streaming SVE mode.
- SVCR (r/w) streaming vector control register, visible at all
exception levels. Provides access to PSTATE.SM and PSTATE.ZA
using MSR and MRS instructions.
- SMPRI_EL1 (r/w) streaming mode execution priority register.
- SMPRIMAP_EL2 (r/w) streaming mode priority mapping register.
- SMIDR_EL1 (ro) streaming mode identification register.
- TPIDR2_EL0 (r/w) for use by SME software to manage per-thread
SME context.
- MPAMSM_EL1 (r/w) MPAM (v8.4) streaming mode register, for
labelling memory accesses performed in streaming mode.
Also added in this patch are the SME mode change instructions.
Three MSR immediate instructions are implemented to set or clear
PSTATE.SM, PSTATE.ZA, or both respectively:
- MSR SVCRSM, #<imm1>
- MSR SVCRZA, #<imm1>
- MSR SVCRSMZA, #<imm1>
The following smstart/smstop aliases are also implemented for
convenience:
smstart -> MSR SVCRSMZA, #1
smstart sm -> MSR SVCRSM, #1
smstart za -> MSR SVCRZA, #1
smstop -> MSR SVCRSMZA, #0
smstop sm -> MSR SVCRSM, #0
smstop za -> MSR SVCRZA, #0
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-06
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D105576
29 lines
890 B
ArmAsm
29 lines
890 B
ArmAsm
// RUN: not llvm-mc -triple aarch64 -mattr=+sme -show-encoding < %s 2>&1 | FileCheck %s
|
|
|
|
|
|
// --------------------------------------------------------------------------//
|
|
// Check read-only
|
|
|
|
msr ID_AA64SMFR0_EL1, x3
|
|
// CHECK: error: expected writable system register or pstate
|
|
// CHECK-NEXT: msr ID_AA64SMFR0_EL1, x3
|
|
|
|
msr SMIDR_EL1, x3
|
|
// CHECK: error: expected writable system register or pstate
|
|
// CHECK-NEXT: msr SMIDR_EL1, x3
|
|
|
|
// --------------------------------------------------------------------------//
|
|
// Check MSR SVCR immediate is in range [0, 1]
|
|
|
|
msr SVCRSM, #-1
|
|
// CHECK: error: immediate must be an integer in range [0, 1].
|
|
// CHECK-NEXT: msr SVCRSM, #-1
|
|
|
|
msr SVCRZA, #2
|
|
// CHECK: error: immediate must be an integer in range [0, 1].
|
|
// CHECK-NEXT: msr SVCRZA, #2
|
|
|
|
msr SVCRSMZA, #4
|
|
// CHECK: error: immediate must be an integer in range [0, 1].
|
|
// CHECK-NEXT: msr SVCRSMZA, #4
|