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539ee65110
This adds MC support for the crypto instructions that were made optional extensions in Armv8.2-A (AArch64 only). Differential Revision: https://reviews.llvm.org/D49370 llvm-svn: 338010
32 lines
1.4 KiB
ArmAsm
32 lines
1.4 KiB
ArmAsm
// RUN: not llvm-mc -triple aarch64 -mattr=+sm4,+sha3 -show-encoding < %s 2>&1 | FileCheck %s
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xar v26.2d, v21.2d, v27.2d, #-1
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xar v26.2d, v21.2d, v27.2d, #64
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sm3tt1a v20.4s, v23.4s, v21.s[4]
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sm3tt1b v20.4s, v23.4s, v21.s[4]
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sm3tt2a v20.4s, v23.4s, v21.s[4]
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sm3tt2b v20.4s, v23.4s, v21.s[4]
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sm3tt2b v20.4s, v23.4s, v21.s[-1]
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// CHECK: error: immediate must be an integer in range [0, 63].
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// CHECK-NEXT: xar v26.2d, v21.2d, v27.2d, #-1
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// CHECK-NEXT: ^
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// CHECK-NEXT: error: immediate must be an integer in range [0, 63].
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// CHECK-NEXT: xar v26.2d, v21.2d, v27.2d, #64
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// CHECK-NEXT: ^
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// CHECK-NEXT: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: sm3tt1a v20.4s, v23.4s, v21.s[4]
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// CHECK-NEXT: ^
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// CHECK-NEXT: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: sm3tt1b v20.4s, v23.4s, v21.s[4]
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// CHECK-NEXT: ^
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// CHECK-NEXT: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: sm3tt2a v20.4s, v23.4s, v21.s[4]
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// CHECK-NEXT: ^
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// CHECK-NEXT: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: sm3tt2b v20.4s, v23.4s, v21.s[4]
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// CHECK-NEXT: ^
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// CHECK-NEXT: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: sm3tt2b v20.4s, v23.4s, v21.s[-1]
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// CHECK-NEXT: ^
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