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5240cb1435
This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}.
Supersedes D35204
Clang counterpart: D36371
Differential Revision: https://reviews.llvm.org/D36369
llvm-svn: 311644
84 lines
3.0 KiB
LLVM
84 lines
3.0 KiB
LLVM
; RUN: llc -mtriple=x86_64-apple-darwin -mcpu skx < %s | FileCheck %s
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; This test compliments the .c test under clang/test/CodeGen/. We check
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; if the inline asm constraints are respected in the generated code.
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; Function Attrs: nounwind
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define void @f_Ym(i64 %m.coerce) {
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; Any mmx regiter constraint
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; CHECK-LABEL: f_Ym:
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; CHECK: ## InlineAsm Start
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; CHECK-NEXT: movq %mm{{[0-9]+}}, %mm1
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; CHECK: ## InlineAsm End
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entry:
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%0 = tail call x86_mmx asm sideeffect "movq $0, %mm1\0A\09", "=^Ym,~{dirflag},~{fpsr},~{flags}"()
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ret void
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}
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; Function Attrs: nounwind
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define void @f_Yi(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
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; Any SSE register when SSE2 is enabled (GCC when inter-unit moves enabled)
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; CHECK-LABEL: f_Yi:
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; CHECK: ## InlineAsm Start
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; CHECK-NEXT: vpaddq %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; CHECK: ## InlineAsm End
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entry:
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%0 = tail call <4 x float> asm sideeffect "vpaddq $0, $1, $2\0A\09", "=^Yi,^Yi,^Yi,~{dirflag},~{fpsr},~{flags}"(<4 x float> %y, <4 x float> %z)
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ret void
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}
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; Function Attrs: nounwind
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define void @f_Yt(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
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; Any SSE register when SSE2 is enabled
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; CHECK-LABEL: f_Yt:
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; CHECK: ## InlineAsm Start
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; CHECK-NEXT: vpaddq %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; CHECK: ## InlineAsm End
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entry:
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%0 = tail call <4 x float> asm sideeffect "vpaddq $0, $1, $2\0A\09", "=^Yt,^Yt,^Yt,~{dirflag},~{fpsr},~{flags}"(<4 x float> %y, <4 x float> %z)
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ret void
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}
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; Function Attrs: nounwind
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define void @f_Y2(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
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; Any SSE register when SSE2 is enabled
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; CHECK-LABEL: f_Y2:
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; CHECK: ## InlineAsm Start
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; CHECK-NEXT: vpaddq %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; CHECK: ## InlineAsm End
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entry:
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%0 = tail call <4 x float> asm sideeffect "vpaddq $0, $1, $2\0A\09", "=^Y2,^Y2,^Y2,~{dirflag},~{fpsr},~{flags}"(<4 x float> %y, <4 x float> %z)
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ret void
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}
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; Function Attrs: nounwind
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define void @f_Yz(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
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; xmm0 SSE register(GCC)
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; CHECK-LABEL: f_Yz:
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; CHECK: ## InlineAsm Start
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; CHECK-NEXT: vpaddq %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm0
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; CHECK-NEXT: vpaddq %xmm0, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; CHECK: ## InlineAsm End
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entry:
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%0 = tail call { <4 x float>, <4 x float> } asm sideeffect "vpaddq $0,$2,$1\0A\09vpaddq $1,$0,$2\0A\09", "=^Yi,=^Yz,^Yi,0,~{dirflag},~{fpsr},~{flags}"(<4 x float> %y, <4 x float> %z)
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ret void
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}
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; Function Attrs: nounwind
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define void @f_Y0(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
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; xmm0 SSE register
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; CHECK-LABEL: f_Y0:
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; CHECK: ## InlineAsm Start
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; CHECK-NEXT: vpaddq %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm0
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; CHECK-NEXT: vpaddq %xmm0, %xmm{{[0-9]+}}, %xmm{{[0-9]+}}
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; CHECK: ## InlineAsm End
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entry:
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%0 = tail call { <4 x float>, <4 x float> } asm sideeffect "vpaddq $0,$2,$1\0A\09vpaddq $1,$0,$2\0A\09", "=^Yi,=^Y0,^Yi,0,~{dirflag},~{fpsr},~{flags}"(<4 x float> %y, <4 x float> %z)
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ret void
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}
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