mirror of
https://github.com/RPCS3/llvm-mirror.git
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a4b855d357
Summary: Change to use EXTRACT_SUBREG instead of COPY_TO_REGCLASS in order to remove unnecessary copy instructions. Differential Revision: https://reviews.llvm.org/D81129
198 lines
4.9 KiB
LLVM
198 lines
4.9 KiB
LLVM
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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; Function Attrs: norecurse nounwind readnone
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define signext i8 @f2c(float %a) {
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; CHECK-LABEL: f2c:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.s.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi float %a to i8
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ret i8 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i16 @f2s(float %a) {
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; CHECK-LABEL: f2s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.s.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi float %a to i16
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ret i16 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i32 @f2i(float %a) {
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; CHECK-LABEL: f2i:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.s.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi float %a to i32
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ret i32 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @f2l(float %a) {
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; CHECK-LABEL: f2l:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.d.s %s0, %s0
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; CHECK-NEXT: cvt.l.d.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi float %a to i64
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ret i64 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i8 @f2uc(float %a) {
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; CHECK-LABEL: f2uc:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.s.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui float %a to i8
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ret i8 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i16 @f2us(float %a) {
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; CHECK-LABEL: f2us:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.s.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui float %a to i16
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ret i16 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i32 @f2ui(float %a) {
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; CHECK-LABEL: f2ui:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.d.s %s0, %s0
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; CHECK-NEXT: cvt.l.d.rz %s0, %s0
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; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui float %a to i32
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ret i32 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @f2ul(float %a) {
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; CHECK-LABEL: f2ul:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1593835520
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; CHECK-NEXT: fcmp.s %s2, %s0, %s1
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; CHECK-NEXT: fsub.s %s1, %s0, %s1
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; CHECK-NEXT: cvt.d.s %s1, %s1
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; CHECK-NEXT: cvt.l.d.rz %s1, %s1
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; CHECK-NEXT: xor %s1, %s1, (1)1
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; CHECK-NEXT: cvt.d.s %s0, %s0
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; CHECK-NEXT: cvt.l.d.rz %s0, %s0
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; CHECK-NEXT: cmov.s.lt %s1, %s0, %s2
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; CHECK-NEXT: or %s0, 0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui float %a to i64
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ret i64 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i8 @d2c(double %a) {
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; CHECK-LABEL: d2c:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi double %a to i8
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ret i8 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define signext i16 @d2s(double %a) {
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; CHECK-LABEL: d2s:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi double %a to i16
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ret i16 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i32 @d2i(double %a) {
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; CHECK-LABEL: d2i:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi double %a to i32
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ret i32 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @d2l(double %a) {
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; CHECK-LABEL: d2l:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.l.d.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptosi double %a to i64
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ret i64 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i8 @d2uc(double %a) {
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; CHECK-LABEL: d2uc:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui double %a to i8
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ret i8 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define zeroext i16 @d2us(double %a) {
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; CHECK-LABEL: d2us:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.w.d.sx.rz %s0, %s0
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui double %a to i16
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ret i16 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i32 @d2ui(double %a) {
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; CHECK-LABEL: d2ui:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cvt.l.d.rz %s0, %s0
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; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui double %a to i32
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ret i32 %conv
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}
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; Function Attrs: norecurse nounwind readnone
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define i64 @d2ul(double %a) {
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; CHECK-LABEL: d2ul:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea.sl %s1, 1138753536
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; CHECK-NEXT: fcmp.d %s2, %s0, %s1
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; CHECK-NEXT: fsub.d %s1, %s0, %s1
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; CHECK-NEXT: cvt.l.d.rz %s1, %s1
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; CHECK-NEXT: xor %s1, %s1, (1)1
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; CHECK-NEXT: cvt.l.d.rz %s0, %s0
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; CHECK-NEXT: cmov.d.lt %s1, %s0, %s2
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; CHECK-NEXT: or %s0, 0, %s1
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; CHECK-NEXT: or %s11, 0, %s9
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entry:
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%conv = fptoui double %a to i64
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ret i64 %conv
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}
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