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- Add a new TableGen backend: CodeBeads - Add support to generate logical operand information For the first item, it is currently a workaround of M68k's (complex) instruction encoding. A typical architecture, especially CISC one like X86, normally uses `MCInstrDesc::TSFlags` to carry instruction encoding info. However, at the early days of M68k backend development, we found it difficult to fit every possible encoding into the 64-bit `MCInstrDesc::TSFlags`. Therefore CodeBeads was invented to provide an alternative, arbitrary length container for instruciton encoding info. However, in the long term we incline not to use a new TG backend for less common pattern like what we encountered in M68k. A bug has been created to host to discussion on migrating from CodeBeads to more concise solution: https://bugs.llvm.org/show_bug.cgi?id=48792 The second item was also served for similar purpose. It created utility functions that tell you the index of a `MachineOperand` in a `MachineInst` given a logical operand index. In normal cases a logical operand is the same as `MachineOperand`, but for operands using complex addressing mode a logical operand might be consisting of multiple `MachineOperand`. The TableGen-ed `getLogicalOperandIdx`, for instance, can give you the mapping between these two concepts. Nevertheless, we hope to remove this feature in the future if possible. Since it's not really useful for the targets supported by LLVM now either. Authors: myhsu, m4yers, glaubitz Differential Revision: https://reviews.llvm.org/D88385 |
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| .. | ||
| GlobalISel | ||
| CGPassBuilderOption.h | ||
| CodeGenCWrappers.h | ||
| GenericOpcodes.td | ||
| Target.td | ||
| TargetCallingConv.td | ||
| TargetInstrPredicate.td | ||
| TargetIntrinsicInfo.h | ||
| TargetItinerary.td | ||
| TargetLoweringObjectFile.h | ||
| TargetMachine.h | ||
| TargetOptions.h | ||
| TargetPfmCounters.td | ||
| TargetSchedule.td | ||
| TargetSelectionDAG.td | ||