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e302c68dde
This patch enables instructions that are destructive on their destination- and first source operand, to be prefixed with a MOVPRFX instruction. This patch also adds a variety of tests: - positive tests for all instructions and forms that accept a movprfx for either or both predicated and unpredicated forms. - negative tests for all instructions and forms that do not accept an unpredicated or predicated movprfx. - negative tests for the diagnostics that get emitted when a MOVPRFX instruction is used incorrectly. This is patch [2/2] in a series to add MOVPRFX instructions: - Patch [1/2]: https://reviews.llvm.org/D49592 - Patch [2/2]: https://reviews.llvm.org/D49593 Reviewers: rengolin, SjoerdMeijer, samparker, fhahn, javed.absar Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D49593 llvm-svn: 338261
75 lines
2.7 KiB
ArmAsm
75 lines
2.7 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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// ------------------------------------------------------------------------- //
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// Invalid element size
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udot z0.s, z1.h, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: udot z0.s, z1.h, z31.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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udot z0.d, z1.b, z31.b
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: udot z0.d, z1.b, z31.b
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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udot z0.d, z1.s, z31.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: udot z0.d, z1.s, z31.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid restricted register for indexed vector.
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udot z0.s, z1.b, z8.b[3]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: udot z0.s, z1.b, z8.b[3]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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udot z0.d, z1.h, z16.h[1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: udot z0.d, z1.h, z16.h[1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// ------------------------------------------------------------------------- //
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// Invalid element index
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udot z0.s, z1.b, z7.b[-1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: udot z0.s, z1.b, z7.b[-1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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udot z0.s, z1.b, z7.b[4]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
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// CHECK-NEXT: udot z0.s, z1.b, z7.b[4]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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udot z0.d, z1.h, z15.h[-1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
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// CHECK-NEXT: udot z0.d, z1.h, z15.h[-1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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udot z0.d, z1.h, z15.h[2]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
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// CHECK-NEXT: udot z0.d, z1.h, z15.h[2]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Negative tests for instructions that are incompatible with movprfx
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movprfx z0.d, p0/z, z7.d
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udot z0.d, z1.h, z31.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
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// CHECK-NEXT: udot z0.d, z1.h, z31.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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movprfx z0.d, p0/z, z7.d
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udot z0.d, z1.h, z15.h[1]
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
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// CHECK-NEXT: udot z0.d, z1.h, z15.h[1]
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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