1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/Transforms/SLPVectorizer
Sanjay Patel 70f97370e8 [SLP] allow matching integer min/max intrinsics as reduction ops
This is a 2nd try of:
3c8473ba534
which was reverted at:
 a26312f9d4f
because of crashing.

This version includes extra code and tests to avoid the known
crashing examples as discussed in PR49730.

Original commit message:
As noted in D98152, we need to patch SLP to avoid regressions when
we start canonicalizing to integer min/max intrinsics.
Most of the real work to make this possible was in:
7202f47508

Differential Revision: https://reviews.llvm.org/D98981
2021-03-29 09:38:18 -04:00
..
AArch64 [SLP] Fix the trunc instruction insertion problem 2021-03-17 13:51:08 +03:00
AMDGPU [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
ARM Precommit transform tests that have poison as insertelement's placeholder 2020-12-24 11:46:17 +09:00
NVPTX Precommit transform tests that have poison as insertelement's placeholder 2020-12-24 11:46:17 +09:00
PowerPC
SystemZ [SLP,LV] Use poison constant vector for shufflevector/initial insertelement 2021-01-06 11:22:50 +09:00
VE [VE][TTI] don't advertise vregs/vops 2020-11-06 11:12:10 +01:00
WebAssembly [CostModel] Remove VF from IntrinsicCostAttributes 2021-02-23 13:03:26 +00:00
X86 [SLP] allow matching integer min/max intrinsics as reduction ops 2021-03-29 09:38:18 -04:00
XCore
int_sideeffect.ll
slp-max-phi-size.ll [SLP,LV] Use poison constant vector for shufflevector/initial insertelement 2021-01-06 11:22:50 +09:00
slp-max-reg-size.ll [SLP] Honor min/max regsize and min/max VF in vectorizeStores 2021-03-22 17:29:35 +01:00
slp-umax-rdx-matcher-crash.ll [SLP] allow matching integer min/max intrinsics as reduction ops 2021-03-29 09:38:18 -04:00
vectorizable-functions-inseltpoison.ll Precommit transform tests that have poison as insertelement's placeholder 2020-12-24 11:46:17 +09:00
vectorizable-functions.ll