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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 14:33:02 +02:00
llvm-mirror/test/CodeGen
Renato Golin ff58af5431 Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs"
This reverts commit r238795, as it broke the Thumb2 self-hosting buildbot.

Since self-hosting issues with Clang are hard to investigate, I'm taking the
liberty to revert now, so we can investigate it offline.

llvm-svn: 238821
2015-06-02 11:47:30 +00:00
..
AArch64 AArch64: Use CMP;CCMP sequences for and/or/setcc trees. 2015-06-01 22:31:17 +00:00
ARM Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs" 2015-06-02 11:47:30 +00:00
BPF
CPP
Generic Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format). 2015-05-27 18:02:19 +00:00
Hexagon Revert "[Hexagon] Adding basic ELF relocation generation and testing advanced relaxation codepath." 2015-06-01 19:20:47 +00:00
Inputs
Mips [mips][FastISel] Implement bswap. 2015-06-01 16:40:45 +00:00
MIR MIR Serialization: use correct line and column numbers for LLVM IR errors. 2015-05-29 17:05:41 +00:00
MSP430
NVPTX [NVPTXFavorNonGenericAddrSpaces] recursively trace into GEP and BitCast 2015-05-29 17:00:27 +00:00
PowerPC Add support for VSX FMA single-precision instructions to the PPC back end 2015-05-29 17:13:25 +00:00
R600 LiveRangeEdit: Fix liveranges not shrinking on subrange kill. 2015-06-01 21:26:26 +00:00
SPARC
SystemZ
Thumb Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM. 2015-05-28 20:02:45 +00:00
Thumb2 Revert "ARM: Thumb2 LDRD/STRD supports independent input/output regs" 2015-06-02 11:47:30 +00:00
WinEH
X86 revert 238809 2015-06-02 07:45:19 +00:00
XCore