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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
llvm-mirror/lib/Target/RISCV
Rafael Espindola d77365c081 Fully fix the movw/movt addend.
The issue is not if the value is pcrel. It is whether we have a
relocation or not.

If we have a relocation, the static linker will select the upper
bits. If we don't have a relocation, we have to do it.

llvm-svn: 307730
2017-07-11 23:18:25 +00:00
..
MCTargetDesc Fully fix the movw/movt addend. 2017-07-11 23:18:25 +00:00
TargetInfo [RISCV] Add bare-bones RISC-V MCTargetDesc 2016-11-01 23:47:30 +00:00
CMakeLists.txt [RISCV] Add bare-bones RISC-V MCTargetDesc 2016-11-01 23:47:30 +00:00
LLVMBuild.txt [RISCV] Add bare-bones RISC-V MCTargetDesc 2016-11-01 23:47:30 +00:00
RISCV.td
RISCVInstrFormats.td [RISCV] Pseudo instructions are isCodeGenOnly, have blank asmstr 2017-02-14 05:17:23 +00:00
RISCVInstrInfo.td
RISCVRegisterInfo.td
RISCVTargetMachine.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
RISCVTargetMachine.h [RISCV] Add bare-bones RISC-V MCTargetDesc 2016-11-01 23:47:30 +00:00