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https://github.com/RPCS3/rpcs3.git
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Some things for u128
This commit is contained in:
Nekotekina
parent
237ab974dd
commit
94c30924dd
@ -2,9 +2,6 @@
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union u128
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{
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__m128 vf;
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__m128i vi;
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u64 _u64[2];
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s64 _s64[2];
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@ -87,6 +84,8 @@ union u128
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float _f[4];
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double _d[2];
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__m128 vf;
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__m128i vi;
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class bit_array_128
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{
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@ -186,6 +185,20 @@ union u128
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return from32(_0, _1, _2, _3);
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}
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static u128 from32p(u32 value)
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{
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u128 ret;
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ret.vi = _mm_set1_epi32((int)value);
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return ret;
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}
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static u128 from8p(u8 value)
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{
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u128 ret;
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ret.vi = _mm_set1_epi8((char)value);
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return ret;
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}
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static u128 fromBit(u32 bit)
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{
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u128 ret = {};
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@ -193,9 +206,41 @@ union u128
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return ret;
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}
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void setBit(u32 bit)
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static u128 fromV(__m128i value)
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{
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_bit[bit] = true;
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u128 ret;
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ret.vi = value;
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return ret;
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}
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static __forceinline u128 add8(const u128& left, const u128& right)
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{
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return fromV(_mm_add_epi8(left.vi, right.vi));
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}
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static __forceinline u128 sub8(const u128& left, const u128& right)
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{
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return fromV(_mm_sub_epi8(left.vi, right.vi));
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}
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static __forceinline u128 minu8(const u128& left, const u128& right)
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{
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return fromV(_mm_min_epu8(left.vi, right.vi));
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}
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static __forceinline u128 eq8(const u128& left, const u128& right)
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{
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return fromV(_mm_cmpeq_epi8(left.vi, right.vi));
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}
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static __forceinline u128 gtu8(const u128& left, const u128& right)
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{
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return fromV(_mm_cmpgt_epu8(left.vi, right.vi));
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}
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static __forceinline u128 leu8(const u128& left, const u128& right)
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{
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return fromV(_mm_cmple_epu8(left.vi, right.vi));
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}
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bool operator == (const u128& right) const
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@ -208,19 +253,19 @@ union u128
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return (_u64[0] != right._u64[0]) || (_u64[1] != right._u64[1]);
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}
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u128 operator | (const u128& right) const
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__forceinline u128 operator | (const u128& right) const
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{
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return from64(_u64[0] | right._u64[0], _u64[1] | right._u64[1]);
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return fromV(_mm_or_si128(vi, right.vi));
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}
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u128 operator & (const u128& right) const
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__forceinline u128 operator & (const u128& right) const
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{
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return from64(_u64[0] & right._u64[0], _u64[1] & right._u64[1]);
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return fromV(_mm_and_si128(vi, right.vi));
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}
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u128 operator ^ (const u128& right) const
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__forceinline u128 operator ^ (const u128& right) const
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{
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return from64(_u64[0] ^ right._u64[0], _u64[1] ^ right._u64[1]);
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return fromV(_mm_xor_si128(vi, right.vi));
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}
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u128 operator ~ () const
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@ -228,6 +273,12 @@ union u128
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return from64(~_u64[0], ~_u64[1]);
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}
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// result = (~left) & (right)
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static __forceinline u128 andnot(const u128& left, const u128& right)
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{
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return fromV(_mm_andnot_si128(left.vi, right.vi));
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}
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void clear()
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{
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_u64[1] = _u64[0] = 0;
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@ -225,16 +225,6 @@ static __forceinline uint64_t cntlz64(uint64_t arg)
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#endif
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}
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static __forceinline __m128i operator & (__m128i A, __m128i B)
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{
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return _mm_and_si128(A, B);
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}
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static __forceinline __m128i operator | (__m128i A, __m128i B)
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{
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return _mm_or_si128(A, B);
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}
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// compare 16 packed unsigned byte values (greater than)
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static __forceinline __m128i _mm_cmpgt_epu8(__m128i A, __m128i B)
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{
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@ -246,5 +236,5 @@ static __forceinline __m128i _mm_cmpgt_epu8(__m128i A, __m128i B)
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static __forceinline __m128i _mm_cmple_epu8(__m128i A, __m128i B)
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{
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// ((B xor 0x80) > (A xor 0x80)) || A == B
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return _mm_cmpgt_epu8(B, A) | _mm_cmpeq_epi8(A, B);
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return _mm_or_si128(_mm_cmpgt_epu8(B, A), _mm_cmpeq_epi8(A, B));
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}
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@ -28,6 +28,7 @@ CPUThread::CPUThread(CPUThreadType type)
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, m_is_branch(false)
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, m_status(Stopped)
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, m_last_syscall(0)
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, m_trace_enabled(false)
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{
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}
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@ -298,7 +299,7 @@ void _se_translator(unsigned int u, EXCEPTION_POINTERS* pExp)
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void CPUThread::Task()
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{
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if (Ini.HLELogging.GetValue()) LOG_NOTICE(PPU, "%s enter", CPUThread::GetFName().c_str());
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if (Ini.HLELogging.GetValue()) LOG_NOTICE(GENERAL, "%s enter", CPUThread::GetFName().c_str());
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const std::vector<u64>& bp = Emu.GetBreakPoints();
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@ -338,6 +339,7 @@ void CPUThread::Task()
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Step();
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//if (PC - 0x13ED4 < 0x288) trace.push_back(PC);
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if (m_trace_enabled) trace.push_back(PC);
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NextPc(m_dec->DecodeMemory(PC + m_offset));
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if (status == CPUThread_Step)
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@ -373,7 +375,25 @@ void CPUThread::Task()
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// TODO: linux version
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#endif
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for (auto& v : trace) LOG_NOTICE(PPU, "PC = 0x%x", v);
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if (trace.size())
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{
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LOG_NOTICE(GENERAL, "Trace begin (%d elements)", trace.size());
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if (Ini.HLELogging.GetValue()) LOG_NOTICE(PPU, "%s leave", CPUThread::GetFName().c_str());
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u32 start = trace[0], prev = trace[0] - 4;
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for (auto& v : trace) //LOG_NOTICE(GENERAL, "PC = 0x%x", v);
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{
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if (v - prev != 4)
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{
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LOG_NOTICE(GENERAL, "Trace: 0x%08x .. 0x%08x", start, prev);
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start = v;
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}
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prev = v;
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}
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LOG_NOTICE(GENERAL, "Trace end: 0x%08x .. 0x%08x", start, prev);
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}
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if (Ini.HLELogging.GetValue()) LOG_NOTICE(GENERAL, "%s leave", CPUThread::GetFName().c_str());
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}
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@ -119,6 +119,7 @@ public:
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u32 nPC;
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u64 cycle;
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bool m_is_branch;
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bool m_trace_enabled;
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bool m_is_interrupt;
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bool m_has_interrupt;
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@ -183,9 +183,9 @@ s64 spursInit(
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u128 wklB = vm::read128(spurs.addr() + 0x30);
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u128 savedA = SPU.ReadLS128(0x180);
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u128 savedB = SPU.ReadLS128(0x190);
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u128 vAA; vAA.vi = _mm_sub_epi32(wklA.vi, savedA.vi);
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u128 vBB; vBB.vi = _mm_sub_epi32(wklB.vi, savedB.vi);
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u128 vAABB; vAABB.vi = (arg1 == 0) ? _mm_add_epi32(vAA.vi, _mm_andnot_si128(g_imm_table.fsmb_table[0x8000 >> var1], vBB.vi)) : vAA.vi;
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u128 vAA = u128::sub8(wklA, savedA);
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u128 vBB = u128::sub8(wklB, savedB);
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u128 vAABB = (arg1 == 0) ? vAA : u128::add8(vAA, u128::andnot(u128::fromV(g_imm_table.fsmb_table[0x8000 >> var1]), vBB));
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u32 vNUM = 0x20;
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u64 vRES = 0x20ull << 32;
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@ -205,34 +205,34 @@ s64 spursInit(
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u128 wklReadyCount1 = vm::read128(spurs.addr() + 0x10);
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u128 savedC = SPU.ReadLS128(0x1A0);
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u128 savedD = SPU.ReadLS128(0x1B0);
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u128 vRC; vRC.vi = _mm_add_epi32(_mm_min_epu8(wklReadyCount0.vi, _mm_set1_epi8(8)), _mm_min_epu8(wklReadyCount1.vi, _mm_set1_epi8(8)));
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u128 vRC = u128::add8(u128::minu8(wklReadyCount0, u128::from8p(8)), u128::minu8(wklReadyCount1, u128::from8p(8)));
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u32 wklFlag = spurs->m.wklFlag.flag.read_relaxed();
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u32 flagRecv = spurs->m.flagRecv.read_relaxed();
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u128 vFM; vFM.vi = g_imm_table.fsmb_table[wklFlag == 0 ? 0x8000 >> flagRecv : 0];
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u128 wklSet1; wklSet1.vi = g_imm_table.fsmb_table[spurs->m.wklSet1.read_relaxed()];
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u128 vFMS1; vFMS1.vi = vFM.vi | wklSet1.vi;
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u128 vFMV1; vFMV1.vi = g_imm_table.fsmb_table[(wklFlag == 0 ? 0x8000 >> flagRecv : 0) >> var1];
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u128 vFM = u128::fromV(g_imm_table.fsmb_table[wklFlag == 0 ? 0x8000 >> flagRecv : 0]);
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u128 wklSet1 = u128::fromV(g_imm_table.fsmb_table[spurs->m.wklSet1.read_relaxed()]);
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u128 vFMS1 = vFM | wklSet1;
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u128 vFMV1 = u128::fromV(g_imm_table.fsmb_table[0x8000 >> var1]);
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u32 var5 = SPU.ReadLS32(0x1ec);
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u128 wklMinCnt = vm::read128(spurs.addr() + 0x40);
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u128 wklMaxCnt = vm::read128(spurs.addr() + 0x50);
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u128 vCC; vCC.vi = _mm_andnot_si128(vFMS1.vi,
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_mm_cmpeq_epi8(wklReadyCount0.vi, _mm_set1_epi8(0)) | _mm_cmple_epu8(vRC.vi, vAABB.vi)) |
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_mm_cmple_epu8(wklMaxCnt.vi, vAABB.vi) |
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_mm_cmpeq_epi8(savedC.vi, _mm_set1_epi8(0)) |
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g_imm_table.fsmb_table[(~var5) >> 16];
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u128 vCCH1; vCCH1.vi = _mm_andnot_si128(vCC.vi,
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_mm_set1_epi8((char)0x80) & (vFMS1.vi | _mm_cmpgt_epu8(wklReadyCount0.vi, vAABB.vi)) |
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_mm_set1_epi8(0x7f) & savedC.vi);
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u128 vCCL1; vCCL1.vi = _mm_andnot_si128(vCC.vi,
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_mm_set1_epi8((char)0x80) & vFMV1.vi |
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_mm_set1_epi8(0x40) & _mm_cmpgt_epu8(vAABB.vi, _mm_set1_epi8(0)) & _mm_cmpgt_epu8(wklMinCnt.vi, vAABB.vi) |
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_mm_set1_epi8(0x3c) & _mm_slli_epi32(_mm_sub_epi32(_mm_set1_epi8(8), vAABB.vi), 2) |
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_mm_set1_epi8(0x02) & _mm_cmpeq_epi8(savedD.vi, _mm_set1_epi8((s8)var0)) |
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_mm_set1_epi8(0x01));
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u128 vSTAT; vSTAT.vi =
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_mm_set1_epi8(0x01) & _mm_cmpgt_epu8(wklReadyCount0.vi, vAABB.vi) |
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_mm_set1_epi8(0x02) & wklSet1.vi |
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_mm_set1_epi8(0x04) & vFM.vi;
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u128 vCC = u128::andnot(vFMS1, u128::eq8(wklReadyCount0, {}) | u128::leu8(vRC, vAABB)) |
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u128::leu8(wklMaxCnt, vAABB) |
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u128::eq8(savedC, {}) |
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u128::fromV(g_imm_table.fsmb_table[(~var5) >> 16]);
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cellSpurs->Notice("vCC = %s", vCC.to_hex().c_str());
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u128 vCCH1 = u128::andnot(vCC,
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u128::from8p(0x80) & (vFMS1 | u128::gtu8(wklReadyCount0, vAABB)) |
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u128::from8p(0x7f) & savedC);
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u128 vCCL1 = u128::andnot(vCC,
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u128::from8p(0x80) & vFMV1 |
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u128::from8p(0x40) & u128::gtu8(vAABB, {}) & u128::gtu8(wklMinCnt, vAABB) |
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u128::from8p(0x3c) & u128::fromV(_mm_slli_epi32(u128::sub8(u128::from8p(8), vAABB).vi, 2)) |
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u128::from8p(0x02) & u128::eq8(savedD, u128::from8p((u8)var0)) |
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u128::from8p(0x01));
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u128 vSTAT =
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u128::from8p(0x01) & u128::gtu8(wklReadyCount0, vAABB) |
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u128::from8p(0x02) & wklSet1 |
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u128::from8p(0x04) & vFM;
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for (s32 i = 0, max = -1; i < 0x10; i++)
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{
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@ -246,7 +246,7 @@ s64 spursInit(
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if (vNUM < 0x10)
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{
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vRES == ((u64)vNUM << 32) | vSTAT.u8r[vNUM];
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vRES = ((u64)vNUM << 32) | vSTAT.u8r[vNUM];
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vSET.u8r[vNUM] = 0x01;
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}
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@ -255,18 +255,16 @@ s64 spursInit(
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if (!arg1 || var1 == vNUM)
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{
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spurs->m.wklSet1._and_not(be_t<u16>::make(0x8000 >> vNUM));
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}
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if (vNUM == flagRecv)
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{
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spurs->m.wklFlag.flag |= be_t<u32>::make(-1);
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if (vNUM == flagRecv)
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{
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spurs->m.wklFlag.flag |= be_t<u32>::make(-1);
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}
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}
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}
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if (arg1 == 0)
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{
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vAA.vi = _mm_add_epi32(vAA.vi, vSET.vi);
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vm::write128(spurs.addr() + 0x20, vAA); // update wklA
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vm::write128(spurs.addr() + 0x20, u128::add8(vAA, vSET)); // update wklA
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SPU.WriteLS128(0x180, vSET); // update savedA
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SPU.WriteLS32(0x1dc, vNUM); // update var1
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@ -274,8 +272,7 @@ s64 spursInit(
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if (arg1 == 1 && vNUM != var1)
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{
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vBB.vi = _mm_add_epi32(vBB.vi, vSET.vi);
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vm::write128(spurs.addr() + 0x30, vBB); // update wklB
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vm::write128(spurs.addr() + 0x30, u128::add8(vBB, vSET)); // update wklB
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SPU.WriteLS128(0x190, vSET); // update savedB
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}
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@ -290,6 +287,7 @@ s64 spursInit(
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//{
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//
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//};
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SPU.m_code3_func = nullptr;
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if (SPU.m_code3_func)
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{
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@ -330,7 +328,10 @@ s64 spursInit(
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SPU.GPR[3]._u32[3] = 0x100;
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SPU.GPR[4]._u64[1] = wkl.data;
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SPU.GPR[5]._u32[3] = stat;
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cellSpurs->Notice("In: [0x1e0] = %s", SPU.ReadLS128(0x1e0).to_hex().c_str());
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//SPU.m_trace_enabled = (num == 0 && wid == 0x20);
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SPU.FastCall(0xa00);
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SPU.m_trace_enabled = false;
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}
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else
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{
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