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8,156 Commits 6 Branches 38 Tags 208 MiB
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Author SHA1 Message Date
RipleyTom
d616ce223c Official ds3 driver support 2019-05-22 16:56:40 +03:00
kd-11
370b9e196d vk: Improve descriptor pool management 
- Add double-buffered descriptor pools to avoid use-after-free situations
- Make descriptor pools more configurable
- Also adds in a hack to allow renderdoc to capture properly
 2019-05-22 01:18:46 +03:00
kd-11
46ba53f122 vk: Propagate more information to the driver 
- Pass "correct" layout to descriptors
- TODO: Fix renderpass attachment descriptors which are inadvertently doing silent transitions
 2019-05-22 01:18:46 +03:00
kd-11
c3b234f972 gl: Fix staging buffer size calculation 2019-05-22 01:18:46 +03:00
Malcolm
9a26c0abda Overlays: Fix timing 2019-05-21 13:01:38 +03:00
Nekotekina
7de3c410cf SPU/PPU: update reservation logic on TSX path transactions 
Make use of lock bits in reservation counters.
On PPU, fallback to compare_and_swap instead of desperate retry.
On SPU, lighten write set on retry by 'locking' outside of the transaction.
 2019-05-20 14:32:50 +03:00
Nekotekina
9abb303569 vm: expand reservation lock bit area to 7 bit 
This is minor change.
 2019-05-19 17:46:55 +03:00
Nekotekina
ceaa669494 LLVM DSL: change array syntax again 
I probably misunderstand something.
 2019-05-19 17:46:55 +03:00
Nekotekina
a6cde36dc4 Link LLVMAsmParser library 2019-05-19 17:46:55 +03:00
kd-11
8009e53642 rsx: Fix upload block range optimization 
- The 'max' index should take the first assigned ID; fixes problems with divisors
 2019-05-19 17:33:21 +03:00
kd-11
a245d9fb24 vk: DOuble general-purpose heap allocation to 128M and add a better diagnostic message for OOM 2019-05-19 17:33:21 +03:00
kd-11
0ef7b2aaff rsx: Use a saner model for swap queue handling 
- Use a simple queue to avoid redundant checks over all the contexts
- Poll queue if RSX pipe is idle
- Only check the queue when the frame context is dirty (after a queue operation)
- Reset descriptors at the start of the frame context to avoid having to synchronize mid-frame
- Fully synchronize if a descriptor reset is required mid-frame (spec compliance; also fixes flickering verts on some hardware)
 2019-05-19 17:33:21 +03:00
kd-11
dc749d3975 vk: Bump max number of allocated draw calls from 4k to 16k 2019-05-19 17:33:21 +03:00
Nekotekina
85920253b3 SPU ASMJIT: fix BISLED 
Properly prevent losing branch target (addr) vs get_events result (flags).
Move get_events() to the beginning.
Match BISL indirect_branch() args.
 2019-05-17 23:44:19 +03:00
Nekotekina
6416fee986 SPU ASMJIT: fix indirect branch target order 
Check stack mirror first, as in SPU LLVM.
 2019-05-17 23:44:19 +03:00
Nekotekina
bf7ee2de4c SPU: fix spu_runtime::g_tail_escape (unused yet) 2019-05-17 23:44:19 +03:00
Nekotekina
2cf139c7a8 SPU analyser: minor Safe fix 
Properly handle known indirect branch target as a function call target.
 2019-05-17 23:44:19 +03:00
msuih
164a7636bf Add max SPURS threads to settings 2019-05-17 23:43:00 +03:00
kd-11
e3f68c66d8 rsx: Use a shared sampler pool instead of relying on the drivers 2019-05-17 22:51:40 +03:00
Megamouse
edb1a32bb1 overlays: use L1 and R1 to step by 10 in the save data list 2019-05-17 20:21:23 +02:00
Megamouse
32bdd8ef7b overlays: move some code to cpp files 2019-05-17 20:21:23 +02:00
kd-11
4037225e98 vk: Workaround for cyclic feedback loops 
- Transition attachments to LAYOUT_GENERAL in case of a feedback loop
  - Fixes appearance of garbage along polygon edges in some
post-processing passes.
  - Also reverse this transition when rendering goes back to normal
 2019-05-17 16:41:17 +03:00
gidan80
9aa08313e3 Qt: Add custom pad configs 
Add a custom pad config for every game.
 2019-05-16 20:37:41 +02:00
kd-11
cb78522620 rsx: Fixup for uninitialized surface antialiasing mode 2019-05-16 19:25:26 +03:00
kd-11
45a13d0319 rsx: Fixup for lost aliased surfaces 
- Intersection routines were changed and require explicit identification of the "old surface"
 2019-05-16 19:25:26 +03:00
kd-11
05eb1e9193 rsx: Fix zombie image references from inside the texture cache 
- Do not add locked orphans to the flush_always cache! They will not remove their cache entries as they are not bound
 2019-05-16 19:25:26 +03:00
kd-11
214bb3ec87 rsx: Always initialize memory unless it is guaranteed to be wiped 2019-05-16 19:25:26 +03:00
kd-11
88290d9fab rsx: Hack around using data regions as transfer targets 2019-05-16 19:25:26 +03:00
kd-11
4182f9984d rsx: Propagate split section information back to the texture cache 2019-05-16 19:25:26 +03:00
kd-11
3c7d8a1099 rsx: Minor texture/surface scanning optimization 
- Also re-enable optimization in blit engine accidentally disabled during debugging
 2019-05-16 19:25:26 +03:00
kd-11
9f0090772a rsx: Fix write tagging when comments are transferred in by blit engine 2019-05-16 19:25:26 +03:00
kd-11
4b443be881 rsx: Fix self-intersection with previous occupant of the address being replaced 2019-05-16 19:25:26 +03:00
kd-11
b840f6da28 [WIP] rsx: Use a sane reference counting model 2019-05-16 19:25:26 +03:00
kd-11
e3cf3ab6b8 rsx: Minor fixes 
- Fix transfer scaling (inverted)
- Fix under-estimated typeless acquisition when doing depth format scaling
 2019-05-16 19:25:26 +03:00
kd-11
e02e27b2b3 rsx: Prevent out-of-bounds writes when resolving shader input textures 
- The target area can also have padding!
 2019-05-16 19:25:26 +03:00
kd-11
1c439f6198 vk: Fix some spec violations 2019-05-16 19:25:26 +03:00
kd-11
88c20afd3a rsx: Implement unaligned surface inheritance with hierachial contribution 
- Allows render targets to behave like stacked 3D views same as shader inputs are resolved
- Basically implements most of 'Read Color/Depth Buffers" option for 'free'.
- Allows splitting RTV/DSV resources if they are superceded by a partial surface
- Also allows intersecting new resources through the surface cache for proper inheritance from other scattered data
- TODO: Refactor bind_surface_as_rtt and bind_surface_as_ds to reduce asinine code duplication
 2019-05-16 19:25:26 +03:00
Nekotekina
a016728a9e SPU LLVM: re-enable stack mirror 
It was disabled due to other bugs which should be fixed now.
 2019-05-16 04:12:08 +03:00
Nekotekina
a69329fe02 SPU ASMJIT: Fix Giga mode 
This is embarassing.
Fixed local instruction table computation (indirect branch).
 2019-05-16 04:11:05 +03:00
Nekotekina
26d131ef29 SPU LLVM: Fix Giga mode 
Forgot to adjust global chunk table computation.
 2019-05-16 04:02:33 +03:00
Nekotekina
91897fa69d SPU LLVM/ASMJIT: fix BRA/BRASL instructions for PIC 
Handle absolute branch addressing correctly.
 2019-05-16 02:41:31 +03:00
Nekotekina
f95ec8a37c SPU LLVM: simplify jump table computation 
Remove one add operation and adjust constants instead.
 2019-05-16 00:54:50 +03:00
Nekotekina
b138d25b97 SPU Disasm: fix absolute addressing in some instructions. 
STQA, LQA, BRA, BRASL instructions.
 2019-05-16 00:53:37 +03:00
Nekotekina
a921af1e96 SPU LLVM/ASMJIT: remove minor unnecessary code 2019-05-16 00:52:52 +03:00
Nekotekina
43ae4b3f33 SPU LLVM/ASMJIT: add missing PC clamping 
Minor fix, since it's mostly impossible to overflow.
 2019-05-16 00:51:47 +03:00
Nekotekina
007108100e SPU: implement spu_runtime::g_tail_escape 
May help to avoid gateway costs in some cases.
 2019-05-15 18:47:40 +03:00
Nekotekina
4e75d2c2f7 SPU LLVM: don't save $2 in optimized functions 2019-05-15 16:41:57 +03:00
Nekotekina
adc7d96683 SPU LLVM: simplify function prototype 
Pass only $3
 2019-05-15 16:18:13 +03:00
Nekotekina
16401722f1 SPU LLVM: fix $SP passing in functions, write PC on halt 
Allows to skip updating $SP in optimizable functions.
 2019-05-15 15:42:03 +03:00
Nekotekina
b2d0ca83fb LLVM DSL: simplify value_t template for array 2019-05-15 15:17:36 +03:00