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llvm-mirror/lib/Target/MBlaze/CMakeLists.txt

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Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
2010-02-23 20:15:24 +01:00
set(LLVM_TARGET_DEFINITIONS MBlaze.td)
Fix cmake build. llvm-svn: 133989
2011-06-28 05:17:03 +02:00
tablegen(MBlazeGenRegisterInfo.inc -gen-register-info)
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc llvm-svn: 134024
2011-06-28 22:07:07 +02:00
tablegen(MBlazeGenInstrInfo.inc -gen-instr-info)
Recommit 116986 with capitalization typo fixed. llvm-svn: 116993
2010-10-21 05:57:26 +02:00
tablegen(MBlazeGenCodeEmitter.inc -gen-emitter)
Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
2010-02-23 20:15:24 +01:00
tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer)
Adding initial AsmParser implementation for the MBlaze backend. It is mostly based on the ARM AsmParser at this time and is not particularly functional. Changed the MBlaze data layout from: "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32" to: "E-p:32:32:32-i8:8:8-i16:16:16" because the MicroBlaze doesn't have i64, f64, v64, or v128 data types. Cleaned up the MBlaze source code: 1. The floating point register class has been removed. The MicroBlaze does not have floating point registers. Floating point values are simply stored in integer registers. 2. Renaming the CPURegs register class to GPR to reflect the standard naming. 3. Removing a lot of stale code from AsmPrinter after the conversion to InstPrinter. 4. Simplified sign extended loads by marking them as expanded in ISelLowering. llvm-svn: 117054
2010-10-21 21:48:38 +02:00
tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher)
Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
2010-02-23 20:15:24 +01:00
tablegen(MBlazeGenDAGISel.inc -gen-dag-isel)
tablegen(MBlazeGenCallingConv.inc -gen-callingconv)
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. llvm-svn: 134281
2011-07-02 00:36:09 +02:00
tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget)
Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
2010-02-23 20:15:24 +01:00
tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic)
Adding disassembler to the MicroBlaze backend. llvm-svn: 117420
2010-10-27 02:23:01 +02:00
tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info)
Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
2010-02-23 20:15:24 +01:00
add_llvm_target(MBlazeCodeGen
MBlazeDelaySlotFiller.cpp
MBlazeInstrInfo.cpp
MBlazeISelDAGToDAG.cpp
MBlazeISelLowering.cpp
Update CMake stuff llvm-svn: 123171
2011-01-10 13:39:23 +01:00
MBlazeFrameLowering.cpp
Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
2010-02-23 20:15:24 +01:00
MBlazeRegisterInfo.cpp
MBlazeSubtarget.cpp
MBlazeTargetMachine.cpp
MBlazeTargetObjectFile.cpp
MBlazeIntrinsicInfo.cpp
Add skeleton target-specific SelectionDAGInfo files. llvm-svn: 101564
2010-04-17 01:04:22 +02:00
MBlazeSelectionDAGInfo.cpp
Recommit 116986 with capitalization typo fixed. llvm-svn: 116993
2010-10-21 05:57:26 +02:00
MBlazeAsmPrinter.cpp
MBlazeMCInstLower.cpp
MBlazeELFWriterInfo.cpp
Adding the MicroBlaze backend. The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
2010-02-23 20:15:24 +01:00
)
Use explicit add_subdirectory's for LLVM target sublibraries instead of testing for its presence at cmake time. This way the build automatically regenerates the makefiles when a svn update brings in a new sublibrary. llvm-svn: 126068
2011-02-20 03:55:27 +01:00
add_subdirectory(AsmParser)
add_subdirectory(Disassembler)
add_subdirectory(InstPrinter)
add_subdirectory(TargetInfo)
Next round of MC refactoring. This patch factor MC table instantiations, MC registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
2011-07-14 22:59:42 +02:00
add_subdirectory(MCTargetDesc)
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