2002-10-28 22:31:48 +01:00
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//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
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2005-04-21 22:39:54 +02:00
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//
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2003-10-20 22:19:47 +02:00
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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2005-04-21 22:39:54 +02:00
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//
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2003-10-20 22:19:47 +02:00
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//===----------------------------------------------------------------------===//
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2002-10-28 22:31:48 +01:00
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//
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// This file exposes a function named BuildMI, which is useful for dramatically
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// simplifying how MachineInstr's are created. Instead of using code like this:
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//
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2004-05-23 07:04:00 +02:00
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// M = new MachineInstr(X86::ADDrr8);
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2002-10-28 22:31:48 +01:00
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// M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
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// M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
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//
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// we can now use code like this:
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//
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2002-10-28 22:43:42 +01:00
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// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
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2002-10-28 22:31:48 +01:00
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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2004-02-29 05:55:28 +01:00
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#include "llvm/CodeGen/MachineBasicBlock.h"
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2002-10-28 22:31:48 +01:00
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2003-11-11 23:41:34 +01:00
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namespace llvm {
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2003-01-13 01:18:44 +01:00
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class MachineInstrBuilder {
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MachineInstr *MI;
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public:
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MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
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/// Allow automatic conversion to the machine instruction we are working on.
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///
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operator MachineInstr*() const { return MI; }
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2004-04-01 06:03:10 +02:00
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operator MachineBasicBlock::iterator() const { return MI; }
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2002-10-28 22:43:42 +01:00
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/// addReg - Add a new virtual register operand...
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///
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const MachineInstrBuilder &addReg(
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int RegNo,
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MachineOperand::UseType Ty = MachineOperand::Use) const {
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MI->addRegOperand(RegNo, Ty);
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return *this;
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}
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2002-11-14 23:32:30 +01:00
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/// addReg - Add an LLVM value that is to be used as a register...
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///
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const MachineInstrBuilder &addReg(
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Value *V,
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MachineOperand::UseType Ty = MachineOperand::Use) const {
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MI->addRegOperand(V, Ty);
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return *this;
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}
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2003-01-15 20:22:23 +01:00
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/// addReg - Add an LLVM value that is to be used as a register...
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///
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const MachineInstrBuilder &addCCReg(
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Value *V,
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MachineOperand::UseType Ty = MachineOperand::Use) const {
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MI->addCCRegOperand(V, Ty);
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return *this;
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}
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2003-01-15 18:18:22 +01:00
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/// addRegDef - Add an LLVM value that is to be defined as a register... this
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/// is the same as addReg(V, MachineOperand::Def).
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///
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const MachineInstrBuilder &addRegDef(Value *V) const {
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return addReg(V, MachineOperand::Def);
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}
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/// addPCDisp - Add an LLVM value to be treated as a PC relative
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/// displacement...
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///
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const MachineInstrBuilder &addPCDisp(Value *V) const {
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MI->addPCDispOperand(V);
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return *this;
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}
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/// addMReg - Add a machine register operand...
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///
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const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
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= MachineOperand::Use) const {
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MI->addMachineRegOperand(Reg, Ty);
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return *this;
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}
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/// addImm - Add a new immediate operand.
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///
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const MachineInstrBuilder &addImm(int Val) const {
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MI->addZeroExtImmOperand(Val);
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return *this;
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}
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/// addSImm - Add a new sign extended immediate operand...
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///
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const MachineInstrBuilder &addSImm(int val) const {
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MI->addSignExtImmOperand(val);
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return *this;
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}
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/// addZImm - Add a new zero extended immediate operand...
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///
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const MachineInstrBuilder &addZImm(unsigned Val) const {
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MI->addZeroExtImmOperand(Val);
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return *this;
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}
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2002-12-15 09:01:02 +01:00
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2005-04-11 09:14:41 +02:00
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/// addImm64 - Add a new 64-bit immediate operand...
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///
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const MachineInstrBuilder &addImm64(uint64_t Val) const {
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MI->addZeroExtImm64Operand(Val);
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return *this;
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}
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2002-12-15 09:01:02 +01:00
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const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
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MI->addMachineBasicBlockOperand(MBB);
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return *this;
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}
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2002-12-25 06:01:18 +01:00
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const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
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MI->addFrameIndexOperand(Idx);
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return *this;
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}
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2003-01-13 01:18:44 +01:00
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const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx) const {
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MI->addConstantPoolIndexOperand(Idx);
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return *this;
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}
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const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
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bool isPCRelative = false, int Offset = 0) const {
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MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
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return *this;
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}
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2004-11-19 21:46:15 +01:00
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const MachineInstrBuilder &addExternalSymbol(const char *FnName,
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bool isPCRelative = false) const{
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MI->addExternalSymbolOperand(FnName, isPCRelative);
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return *this;
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}
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};
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/// BuildMI - Builder interface. Specify how to create the initial instruction
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/// itself. NumOperands is the number of operands to the machine instruction to
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/// allow for memory efficient representation of machine instructions.
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///
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inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
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return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
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}
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/// BuildMI - This version of the builder sets up the first operand as a
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/// destination virtual register. NumOperands is the number of additional add*
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/// calls that are expected, not including the destination register.
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///
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inline MachineInstrBuilder BuildMI(
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int Opcode, unsigned NumOperands,
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unsigned DestReg,
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MachineOperand::UseType useType = MachineOperand::Def) {
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return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
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true, true)).addReg(DestReg, useType);
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2002-12-13 10:33:06 +01:00
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}
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction before the given position in the given MachineBasicBlock, and
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/// sets up the first operand as a destination virtual register.
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/// NumOperands is the number of additional add* calls that are expected,
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/// not including the destination register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineBasicBlock::iterator I,
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int Opcode, unsigned NumOperands,
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unsigned DestReg) {
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MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
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}
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2004-05-23 07:04:00 +02:00
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction before the given position in the given MachineBasicBlock, and
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/// does NOT take a destination register.
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///
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2004-02-29 05:55:28 +01:00
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inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
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MachineBasicBlock::iterator I,
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int Opcode, unsigned NumOperands) {
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MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
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BB.insert(I, MI);
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return MachineInstrBuilder(MI);
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}
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2004-05-23 07:04:00 +02:00
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction at the end of the given MachineBasicBlock, and does NOT take a
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/// destination register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
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unsigned NumOperands) {
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return BuildMI(*BB, BB->end(), Opcode, NumOperands);
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}
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2002-10-30 00:18:23 +01:00
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2004-05-23 07:04:00 +02:00
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/// BuildMI - This version of the builder inserts the newly-built
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/// instruction at the end of the given MachineBasicBlock, and sets up the first
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/// operand as a destination virtual register. NumOperands is the number of
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/// additional add* calls that are expected, not including the destination
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/// register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
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unsigned NumOperands, unsigned DestReg) {
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return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
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}
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2003-11-11 23:41:34 +01:00
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} // End llvm namespace
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2002-10-28 22:31:48 +01:00
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#endif
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